Atmel AT90PWM2 Manual page 130

16.3 PSC Description
4317I–AVR–01/08
Figure 16-1. Power Stage Controller 0 or 1 Block Diagram
PSC Counter
=
OCRnRB
=
OCRnSB
=
OCRnRA
=
OCRnSA
PICRn
PCNFn
PCTLn
Note: n = 0, 1
The principle of the PSC is based on the use of a counter (PSC counter). This counter is able to
count up and count down from and to values stored in registers according to the selected run-
ning mode.
The PSC is seen as two symetrical entities. One part named part A which generates the output
PSCOUTn0 and the second one named part B which generates the PSCOUTn1 output.
Each part A or B has its own PSC Input Module to manage selected input.
Waveform
Generator B
PSC Input
PSCn Input B
Module B
Part B
PSCn Input A
PSC Input
Module A
Waveform
Generator A
Part A
PFRCnB POM2(PSC2 only)
PFRCnA PSOCn
AT90PWM2/3/2B/3B
PSCOUTn1
( From Analog
Comparator n Ouput )
PISELnB
PSCINn
PISELnA
PSCOUTn0
131