Emac Control Module Transmit Interrupt Status Register (Cmtxintstat); Emac Control Module Transmit Interrupt Status Register (Cmtxintstat) Field Descriptions - Texas Instruments TMS320DM646x User Manual

EMAC Control Module Registers

3.11 EMAC Control Module Transmit Interrupt Status Register (CMTXINTSTAT)

The transmit interrupt status register (CMTXINTSTAT) is shown in
Figure 23. EMAC Control Module Transmit Interrupt Status Register (CMTXINTSTAT)
31
15
Reserved
LEGEND: R = Read only; -n = value after reset
Table 20. EMAC Control Module Transmit Interrupt Status Register (CMTXINTSTAT)
Bit Field
31-8 Reserved
7-0 TXPULSEINTTSTAT[n]
68 Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO)
R-0
Field Descriptions
Value Description
0 Reserved
Transmit interrupt status. Each bit shows the status of the corresponding channel n transmit
interrupt.
Bit n = 0, channel n transmit interrupt is not pending.
Bit n = 1, channel n transmit interrupt is pending.
Figure 23
Reserved
R-0
8 7
TXPULSEINTTSTAT
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and described in Table
R-0
SPRUEQ6 – December 2007
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20.
16
0