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Table 68. MAC Control Register (MACCONTROL) Field Descriptions (continued)
Bit
Field
5
GMIIEN
4
TXFLOWEN
3
RXBUFFERFLOWEN
2
Reserved
1
LOOPBACK
0
FULLDUPLEX
SPRUEQ6 – December 2007
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Value
Description
GMII enable bit.
0
GMII RX and TX are held in reset.
1
GMII RX and TX are enabled for receive and transmit.
Transmit flow control enable bit. This bit determines if incoming pause frames are acted upon
in full-duplex mode. Incoming pause frames are not acted upon in half-duplex mode,
regardless of the TXFLOWEN bit setting. The RXMBPENABLE bits determine whether or not
received pause frames are transferred to memory.
0
Transmit flow control is disabled. Full-duplex mode: incoming pause frames are not acted
upon.
1
Transmit flow control is enabled. Full-duplex mode: incoming pause frames are acted upon.
Receive buffer flow control enable bit.
0
Receive flow control is disabled. Half-duplex mode: no flow control generated collisions are
sent. Full-duplex mode: no outgoing pause frames are sent.
1
Receive flow control is enabled. Half-duplex mode: collisions are initiated when receive buffer
flow control is triggered. Full-duplex mode: outgoing pause frames are sent when receive flow
control is triggered.
0
Reserved
Loopback mode. The loopback mode forces internal full-duplex mode regardless of the
FULLDUPLEX bit setting. The loopback bit should be changed only when GMIIEN bit is
deasserted.
0
Loopback mode is disabled.
1
Loopback mode is enabled.
Full-duplex mode. The gigabit mode (GIG = 1) forces full-duplex mode regardless of the
FULLDUPLEX bit setting
0
Half-duplex mode is enabled.
1
Full-duplex mode is enabled.
Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO)
Ethernet Media Access Controller (EMAC) Registers
111
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