Table Of Contents - Texas Instruments TMS320DM646x User Manual

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Preface
1 Introduction
1.1 Purpose of the Peripheral
1.2 Features
1.3 Functional Block Diagram
1.4 Industry Standard(s) Compliance Statement
2 Architecture
2.1 Clock Control
2.2 Memory Map
2.3 Signal Descriptions
2.4 Ethernet Protocol Overview
2.5 Programming Interface
2.6 EMAC Control Module
2.7 MDIO Module
2.8 EMAC Module
2.9 Media Independent Interface (MII)
2.10 Packet Receive Operation
2.11 Packet Transmit Operation
2.12 Receive and Transmit Latency
2.13 Transfer Node Priority
2.14 Reset Considerations
2.15 Initialization
2.16 Interrupt Support
2.17 Power Management
2.18 Emulation Considerations
3 EMAC Control Module Registers
3.1 EMAC Control Module Identification and Version Register (CMIDVER)
3.2 EMAC Control Module Software Reset Register (CMSOFTRESET)
3.3 EMAC Control Module Emulation Control Register (CMEMCONTROL)
3.4 EMAC Control Module Interrupt Control Register (CMINTCTRL)
3.5 EMAC Control Module Receive Threshold Interrupt Enable Register
(CMRXTHRESHINTEN)
3.6 EMAC Control Module Receive Interrupt Enable Register (CMRXINTEN)
3.7 EMAC Control Module Transmit Interrupt Enable Register (CMTXINTEN)
3.8 EMAC Control Module Miscellaneous Interrupt Enable Register (CMMISCINTEN)
3.9 EMAC Control Module Receive Threshold Interrupt Status Register
(CMRXTHRESHINTSTAT)
3.10 EMAC Control Module Receive Interrupt Status Register (CMRXINTSTAT)
3.11 EMAC Control Module Transmit Interrupt Status Register (CMTXINTSTAT)
3.12 EMAC Control Module Miscellaneous Interrupt Status Register (EWMISCSTAT)
3.13 EMAC Control Module Receive Interrupts per Millisecond Register (CMRXINTMAX)
3.14 EMAC Control Module Transmit Interrupts per Millisecond Register (CMTXINTMAX)
4 MDIO Registers
4.1 MDIO Version Register (VERSION)
4.2 MDIO Control Register (CONTROL)
SPRUEQ6 - December 2007
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