Texas Instruments TMS320F2837 D Series Manual

Texas Instruments TMS320F2837 D Series Manual

Dual-core real-time mcus silicon errata (silicon revisions c, b, a, 0)
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Errata
TMS320F2837xD Dual-Core Real-Time MCUs Silicon
Errata (Silicon Revisions C, B, A, 0)
This document describes the known exceptions to the functional specifications (advisories). This document
may also contain usage notes. Usage notes describe situations where the device's behavior may not match
presumed or documented behavior. This may include behaviors that affect device performance or functional
correctness.
Matrix............................................................................................................................................................3
Matrix................................................................................................................................................................3
2 Nomenclature, Package Symbolization, and Revision Identification................................................................................
2.1 Device and Development Support Tool Nomenclature......................................................................................................
Supported.............................................................................................................................................................6
3.1 Silicon Revision C Usage Notes........................................................................................................................................
3.2 Silicon Revision C Advisories...........................................................................................................................................
Advisories...........................................................................................................................................39
Advisories...........................................................................................................................................43
6 Silicon Revision 0 Usage Notes and Advisories...............................................................................................................
6.1 Silicon Revision 0 Usage Notes.......................................................................................................................................
6.2 Silicon Revision 0 Advisories...........................................................................................................................................
Support.......................................................................................................................................................50
8
Trademarks............................................................................................................................................................................50
9 Revision History...................................................................................................................................................................
Figure 2-1. Example of Package Symbolization - ZWT..............................................................................................................
Figure 2-2. Example of Package Symbolization - PTP...............................................................................................................
Figure 2-3. Example of Device Nomenclature.............................................................................................................................
Figure 3-1. Pipeline Diagram of the Issue When There are no Stalls in the Pipeline................................................................
Figure 3-4. Placement of Series Termination Resistor and Pullup Resistor..............................................................................
Figure 3-5. Undesired Trip Event and Blanking Window Expiration..........................................................................................
Figure 3-6. Resulting Undesired ePWM Outputs Possible........................................................................................................
Figure 4-1. Single-Ended Input Model.......................................................................................................................................
Table 1-1. Usage Notes Matrix....................................................................................................................................................
Matrix.........................................................................................................................................................3
Table 2-1. Determining Silicon Revision From Lot Trace Code...................................................................................................
SPRZ412M - DECEMBER 2013 - REVISED MARCH 2023
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ABSTRACT

Table of Contents

Matrices..................................................................................................................................3
Identification...........................................................................................................7
Advisories.................................................................................................................9
Advisories...............................................................................................................39
Notes.......................................................................................................................................39
Advisories...............................................................................................................43
Notes.......................................................................................................................................43
List of Figures
Place...........................................................................................................24
List of Tables
Module.......................................................................................................................................11
Copyright © 2023 Texas Instruments Incorporated
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Table of Contents
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11
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41
3
7
1
Revisions C, B, A, 0)

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Shubham Kumar
June 20, 2025

The ground pins which re available in the TMS320F28379D boards are internally connected with each other or they are the different grounds? Can we connect the CRO probes with different grounds at once?

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Summary of Contents for Texas Instruments TMS320F2837 D Series

  • Page 1: Table Of Contents

    Table 2-1. Determining Silicon Revision From Lot Trace Code....................Table 3-1. Bandgap Usage by Module............................11 SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 2 Table 3-2. Memories Impacted by Advisory..........................28 Table 5-1. Crystal Equivalent Series Resistance (ESR) Requirements..................48 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 3: Usage Notes And Advisories Matrices

    Spurious VCU Interrupt (ePIE 12.6) Can Occur When First Enabled SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 4 Boot ROM: Device Will Hang During Boot if X1 Clock Source is not Present HRPWM HRPWM: HRCNFG Register Reads and Bit-Wise Writes TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 5 McBSP: McBSP Transmit in SPI Slave Mode Crystal Crystal: Maximum Equivalent Series Resistance (ESR) Values are Reduced SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 6: Nomenclature, Package Symbolization, And Revision Identification

    Predictions show that prototype devices (X or P) have a greater failure rate than the standard production devices. Texas Instruments recommends that these devices not be used in any production system because their expected end-use failure rate still is undefined. Only qualified production devices are to be used.
  • Page 7: Package Symbolization And Revision Identification

    0x0003 This silicon revision is available as TMS. Silicon Revision ID SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 8: Figure 2-3. Example Of Device Nomenclature

    Nomenclature, Package Symbolization, and Revision Identification www.ti.com Figure 2-3. Example of Device Nomenclature TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 9: Silicon Revision C Usage Notes And Advisories

    To use the latest maintained SYS/BIOS version, download the SYS/BIOS library and include in the application flash image instead of using the ROM version. SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 10 McBSP to a different bus controller. This will ensure that the state of XRDY is accurate and the simultaneous set/clear action does not occur. TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 11: Silicon Revision C Advisories

    For simplicity, it is recommended that 500 µs be used as the power-up time for both CMPSS and GPDAC. SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 12 // the ADCINTOVF here so the external routine will detect the // condition. AdcaRegs.ADCINTOVFCLR.bit.ADCINT1 = 1; // clear OVF TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 13 This will result in enough delay that the second channel will always read the fresh ADC result. SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 14 (larger than the maximum packet size) and duplicate receive data. Workarounds None TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 15 All applications should follow the restrictions outlined in this advisory. Contact TI for devices already in production which violate this advisory. SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 16 Configure GPIO inputs configured as eQEP pins for non-asynchronous mode (any GPxQSELn register option except “11b = Asynchronous”). TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 17 The workaround can also be applied at the System level by a supervisor resetting the device if it is not responding. SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 18 The latest released C2000Ware, which has this workaround implemented, can be used as reference. TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 19 SDIFLG register to prevent further SDFM interrupts. SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 20 5. Enable the SDFM X-BAR trip events in the corresponding X-BAR registers (ePWM X-BAR or GPIO X-BAR event). TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 21 Design an application-level algorithm that is robust against occasional incorrect SDFM results. SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 22: Figure 3-1. Pipeline Diagram Of The Issue When There Are No Stalls In The Pipeline

    Figure 3-1. Pipeline Diagram of the Issue When There are no Stalls in the Pipeline TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 23: Figure 3-2. Pipeline Diagram Of The Issue If There Is A Stall In The E3 Slot Of The Instruction I1

    Figure 3-3 shows the pipeline diagram with the workaround in place. SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 24: Figure 3-3. Pipeline Diagram With Workaround In Place

    Figure 3-3. Pipeline Diagram With Workaround in Place TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 25 PIE group (PIE group 12) may inadvertently be missed. SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 26 // from an FPU operation (not EISQRTF32/EINVF32) // Handle Overflow/Underflow condition // Ack the interrupt and exit TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 27 SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 28 0x0001 7FF8–0x0001 7FFF GS15 0x0001 BFF8–0x0001 BFFF Flash 0x000B FFF0–0x000B FFFF TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 29 V and V supply sequencing. DDOSC SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 30 Workaround 3: An external 82-Ω resistor can be added to the board between V TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 31 SCL and SDA terminals. The placement of the series termination resistor and pullup resistor should be connected as shown in Figure 3-4. SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 32: Figure 3-4. Placement Of Series Termination Resistor And Pullup Resistor

    DDIO Figure 3-4. Placement of Series Termination Resistor and Pullup Resistor TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 33: Figure 3-5. Undesired Trip Event And Blanking Window Expiration

    This works because Blanking Windows persist across period boundaries. SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 34 // Delay of 50 SYSCLK Cycles C2000Ware_3_00_00_00 and later revisions will have this workaround implemented. TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 35 PWM duty cycle to a maximum value that will avoid simultaneous COMPSTS[COMPHSTS] and PWMSYNC assertions. SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 36 // To tri-state the GPIO(logic 1),set GPIO as input GpioCtrlRegs.GPxDIR.bit.GPIOx = 0; TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 37 DCAN FIFO mode. Workarounds None SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 38 DMA registers will be overwritten during the ROM PIE vector initialization. Workarounds None TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 39: Silicon Revision B Usage Notes And Advisories

    Offset Calibration” section of the TMS320F2837xD Dual-Core Real-Time Microcontrollers Technical Reference Manual SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 40 For the revisions affected, the S+H duration should be chosen to account for the additional switch resistance. TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 41: Figure 4-1. Single-Ended Input Model

    S+H duration should be chosen to account for the additional capacitance. SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 42 Apply external clock source to X1 on silicon revision B devices, even if using INTOSC as the application clock source. TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 43: Silicon Revision A Usage Notes And Advisories

    ESD mats, wrist-straps, ionizers, and so forth). If ADC performance becomes degraded, replace the device. SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 44 0x0000 74BF, 0x0000 753F, and 0x0000 75BF. This workaround is valid only on the revisions affected. TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 45 The CMPIN4N, CMPIN4P, CMPIN5N, and CMPIN5P functions are not available on the silicon revisions affected. Workarounds None SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 46 PCB level timing requirements of these pins. TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 47 Do not transmit data using SPI Slave mode of the McBSP. SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 48 Crystal shunt capacitance (C0) should be less than or equal to 7 pF. Workarounds None TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 Revisions C, B, A, 0) Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated...
  • Page 49: Silicon Revision 0 Usage Notes And Advisories

    128 codes, in sets of up to 4 missing codes in a row. Workarounds None SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 50: Documentation Support

    TMS320F2837xD Dual-Core Real-Time Microcontrollers Technical Reference Manual 8 Trademarks ™ TMS320 is a trademark of Texas Instruments. All trademarks are the property of their respective owners. TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023...
  • Page 51: Revision History

    CLB: Back-to-Back PUSH or PULL Instructions With More Than One Active High-Level Controller (HLC) Channel is Not Supported advisory......................14 SPRZ412M – DECEMBER 2013 – REVISED MARCH 2023 TMS320F2837xD Dual-Core Real-Time MCUs Silicon Errata (Silicon Submit Document Feedback Revisions C, B, A, 0) Copyright © 2023 Texas Instruments Incorporated...
  • Page 52 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2023, Texas Instruments Incorporated...

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