Table 50. Spi Mode Fault Trigger Conditions; Table 51. Spi Master Mode Sel Pin Status; Figure 159. Spi Multi-Master Slave Environment - Holtek HT32F52342 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52342/HT32F52352
Master

Figure 159. SPI Multi-Master Slave Environment

Table 50. SPI Mode Fault Trigger Conditions

Mode fault
1. SPI Master mode
Trigger condition 2. SELOEN = 0 in the SPICR0 register – SEL pin is configured to be the input mode
3. SEL signal changes to an active level when driven by the external SPI master
1. Mode fault flag is set.
2. The SPIEN bit in the SPICR0 register is reset. This disables the SPI interface and blocks
SPI behavior
all output signals from the device.
3. The MODE bit in the SPICR1 register is reset. This forces the device into slave mode.

Table 51. SPI Master Mode SEL Pin Status

SEL as Input - SELOEN = 0
Multi-master Support
Use Another GPIO to replace the
SPI SEL control signal
SEL pin function
Case 1
Continuous transfer
Not supported
Case 1: SEL signal must be inactive between each data transfer.
Case 2: SEL signal will not to be active until the last data frame has finished.
Note: When the SPI is in the slave mode, the SEL signal is always an input and not affected by the SELOEN bit in
the SPICR0 register.
Rev. 1.30
SCK
MOSI
SPI
MISO
SEL
I/O 0
I/O 1
I/O 2
Case 2
Supported
484 of 656
SCK
MOSI
MISO
SEL
I/O 0
I/O 1
I/O 2
SCK
MOSI
MISO
SEL
SCK
MOSI
MISO
SEL
Descriptions
SEL as Output - SELOEN = 1
Not support
SEL pin in hardware or software mode
- using SELM setting
Case 1 Case 2
Using hardware control Hardware or software control
SPI
Master
SPI
Slave
SPI
Slave
September 28, 2018