Card Clock And Data Selection; Card Detection; Figure 177. Character And Block Waiting Time Duration - Cwt And Bwt - Holtek HT32F52342 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52342/HT32F52352
SCI_DIO
Char 0
SCIàSmart Card
Figure 177. Character and Block Waiting Time Duration – CWT and BWT

Card Clock and Data Selection

The SCI communicates with an external Smart Card using a series of external pins. These are the
serial data pin, SCI_DIO, output clock pin, SCI_CLK, and the Card Detection input pin, SCI_DET.
The SCI serial data pin, named SCI_DIO, can be controlled by the SCI hardware circuitry or the
software control bits depending upon whether the SCI is operated in the SCI Transfer Mode or in
the Manual Mode. The mode selection is determined by the SCIM bit in the CR register. The SCI_
DIO pin status is controlled by the CDIO bit in the CCR register when the SCI is configured to
operate in the Manual mode by clearing the SCIM bit in the CR register. In the Manual Mode the
SCI_DIO pin status is a copy of the CDIO bit. However, when the SCI is configured to operate in
the SCI Transfer Mode, the SCI_DIO pin status is determined by the SCI transfer circuitry.
The SCI clock output pin named SCI_CLK can be controlled by the 6-bit SCI prescaler or the
software control bits depending upon the condition of the CLKSEL bit in the CCR register. The
SCI_CLK pin status is controlled by the CCLK bit in the CCR register when the CLKSEL bit is
cleared to 0. The SCI_CLK pin status is a copy of the CCLK bit. However, when the CLKSEL bit is
set to 1, the SCI_CLK signal is sourced from the 6-bit prescaler output. The prescaler division ratio
is determined by the PSC field in the PSCR register.

Card Detection

When an external Smart Card is inserted, the internal card detector can detect this insertion
operation and generate a card insertion interrupt if the corresponding interrupt enable control
bit, CARDIRE, in the IER register is set to 1. Similarly, if the card is removed, the internal card
detector can also detect the removal and consequently generate a card removal interrupt when
the corresponding interrupt function is enabled by setting the control bit, CARDIRE, in the IER
register, to 1.
The card detector can support two kinds of card detect switch mechanisms. One is a normally
open switch mechanism when the card is not present and the other is a normally closed switch
mechanism. After noting which card detect switch mechanism type is used, the card switch
selection should be configured by setting the selection bit, DETCNF, in the CR register to correctly
detect the card presence. No matter what type of the card switch is selected, by configuring the
DETCNF bit, the card Insertion/Removal flag, CPREF, in the SR register will be set to 1 when the
card is actually present on the SCI_DET pin. Note that there are no hardware de-bounce circuits in
the card detector. Any change of the SCI_DET pin level will cause the CPREF bit to change. The
required de-bounce time should be handled by the application program.
Rev. 1.30
Start bit
Program the CWT
Program the BWT
Char 1 Char n
t
BWT
BWT is reloaded
on Start bit
543 of 656
Start bit
Char 0 Char 1
t
CWT
Smart CardàSCI
September 28, 2018
SCI_DIO