32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F52342/HT32F52352
Port B Pull-Up Selection Register – PBPUR
This register is used to enable or disable the GPIO Port B pull-up function.
Offset:
0x008
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
RW
0 RW
7
Type/Reset
RW
0 RW
Bits
Field
[15:10]
PBPUn
[8:0]
Rev. 1.30
30
29
28
22
21
20
14
13
12
PBPU
0 RW
0 RW
6
5
4
0 RW
0 RW
Descriptions
GPIO Port B pin n Pull-Up Selection Control Bits (n = 0 ~ 8, 10 ~ 15)
0: Pin n pull-up function is disabled
1: Pin n pull-up function is enabled
Note: When the pull-up and pull-down functions are both enabled, the pull-up
function will have the higher priority and therefore the pull-down function will be
blocked and disabled.
144 of 656
27
26
Reserved
19
18
Reserved
11
10
0 RW
0 RW
0
3
2
PBPU
0 RW
0 RW
0 RW
25
24
17
16
9
8
Reserved
PBPU
RW
0
1
0
0 RW
0
September 28, 2018
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