Timer Mode Configuration Register - Mdcfr - Holtek HT32F52342 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52342/HT32F52352
Timer Mode Configuration Register – MDCFR
This register specifies the SCTM slave mode selection.
Offset: 0x004
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset
Bits Field
[10:8] SMSEL
Rev. 1.30
30 29 28
22 21 20
14 13 12
Reserved
6 5 4
Descriptions
Slave Mode Selection
SMSEL [2:0] Mode
000 Disable mode The prescaler is clocked directly by the internal clock.
100 Restart Mode
101 Pause Mode
110 Trigger Mode
111 STIED
Others Reserved
412 of 656
27 26
Reserved
19 18
Reserved
11 10
RW 0 RW
3 2
Reserved
Descriptions
The counter value restarts from 0 or the CRR shadow
register value depending upon the counter mode on
the rising edge of the STI signal. The registers will
also be updated.
The counter starts to count when the selected trigger
input STI is high. The counter stops counting on the
instant, not being reset, when the STI signal changes
its state to a low level. Both the counter start and stop
control are determined by the STI signal.
The counter starts to count from the original value in
the counter on the rising edge of the selected trigger
input STI. Only the counter start control is determined
by the STI signal.
The rising edge of the selected trigger signal STI will
clock the counter.
25 24
17 16
9 8
SMSEL
0 RW 0
1 0
September 28, 2018