Figure 101. Channel 3 Output With A Break Event Occurrence - Holtek HT32F52342 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52342/HT32F52352
When using the break function, the channel output enable signals and output levels are changed
depending on several control bits which include the CHMOE, CHOSSI, CHOSSR, CHxOIS
and CHxOISN bits. Once a break event occurs, the output enable bit CHMOE will be cleared
asynchronously. The break interrupt f lag, BRKIF, will be set and then an interrupt will be
generated if the break function interrupt is enabled by setting the BRKIE bit to 1. The channel
output behavior is as described below:
▄
If complementary outputs are used, the channel outputs a level signal first which can be
selected to be either a disable or inactive level, selected by configuring the CHOSSI bit in the
CHBRKCTR register. After the dead-time duration, the outputs will be changed to the idle state.
The idle state is determined by the CHxOIS/CHxOISN bits in the CHBRKCFR register.
▄
If complementary outputs are not used (Channel 3), the channel will output an idle state.
The main output enable control bit, CHMOE can not be set until the break event is cleared.

Figure 101. Channel 3 Output with a Break Event Occurrence

Rev. 1.30
CHMOE
CHxOREF
CH3P = 0, CH3OIS =0
CH3O
CH3P = 0, CH3OIS =1
CH3O
CH3P = 1, CH3OIS =0
CH3O
CH3P = 1, CH3OIS =1
CH3O
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break event
September 28, 2018