Usb Endpoint 0 Interrupt Status Register - Usbep0Isr - Holtek HT32F52342 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52342/HT32F52352
USB Endpoint 0 Interrupt Status Register – USBEP0ISR
This register specifies the Endpoint 0 interrupt status.
Offset: 0x01C
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
UERIF
Type/Reset WC 0 WC
Bits Field
[11] ZLRXIF
[10] SDERIF
[9] SDRXIF
[8] STRXIF
[7] UERIF
[6] STLIF
[5] NAKIF
Rev. 1.30
30 29 28
22 21 20
14 13 12
Reserved
6 5 4
STLIF NAKIF IDTXIF
0 WC 0 WC
Descriptions
Zero Length Data Received Interrupt Flag
This bit is set by the hardware when a zero length data packet is received.
This bit is cleared by hardware when a SETUP Token is received or by writing 1.
SETUP Data Error Interrupt Flag
This bit is set by the hardware when the SETUP data packet length is not 8 bytes.
This bit is cleared by hardware when a SETUP Token is received or by writing 1.
SETUP Data Received Interrupt Flag
This bit is set by the hardware when a SETUP data packet from the USB host has
been received. This bit is cleared by the hardware when a SETUP Token is received
or by writing 1. If the received SETUP data is not accessed by the application
software before the next SETUP packet is received, the SETUP data buffer will be
overwritten.
SETUP Token Received Interrupt Flag
This bit is set by the hardware when a SETUP token is received and is cleared by
writing 1.
USB Error Interrupt Flag
This bit is set by the hardware when an error occurs during the Endpoint 0
transaction.
This bit is cleared by hardware when a SETUP Token is received or by writing 1.
STALL Transmitted Interrupt Flag
This bit is set by the hardware when a STALL signal is sent in response to an IN or
OUT transaction.
This bit is cleared by hardware when a SETUP Token is received or by writing 1.
NAK Transmitted Interrupt Flag
This bit is set by the hardware when a NAK signal is sent in response to an IN or
OUT transaction.
This bit is cleared by hardware when a SETUP Token is received or by writing 1.
578 of 656
27 26
Reserved
19 18
Reserved
11 10
ZLRXIF SDERIF
WC 0 WC 0 WC
3 2
ITRXIF ODOVIF
0 WC 0 WC 0 WC
25 24
17 16
9 8
SDRXIF STRXIF
0 WC 0
1 0
ODRXIF OTRXIF
0 WC 0
September 28, 2018