Holtek HT32F52342 User Manual page 265

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52342/HT32F52352
Bits Field
[10:8] SMSEL
[0] TSE
Rev. 1.30
Descriptions
Slave Mode Selection
SMSEL [2:0] Mode
000 Disable mode
Quadrature Decoder
001
mode 1
Quadrature Decoder
010
mode 2
Quadrature Decoder
011
mode 3
100 Restart Mode
101 Pause Mode
110 Trigger Mode
111 STIED
Timer Synchronization Enable
0: No action
1: Master timer (current timer) will generate a delay to synchronize its slave timer
through the MTO signal.
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Descriptions
The prescaler is clocked directly by the internal
clock.
The counter uses the clock pulse generated
from the interaction between the TI0 and
TI1 signals to drive the counter prescaler. A
transition of the TI0 edge is used in this mode
depending upon the TI1 level.
The counter uses the clock pulse generated
from the interaction between the TI0 and
TI1 signals to drive the counter prescaler. A
transition of the TI1 edge is used in this mode
depending upon the TI0 level.
The counter uses the clock pulse generated
from the interaction between the TI0 and
TI1 signals to drive the counter prescaler. A
transition of one channel edge is used in the
quadrature decoder mode 3 depending upon
the other channel level.
The counter value restarts from 0 or the CRR
shadow register value depending upon the
counter mode on the rising edge of the STI
signal. The registers will also be updated.
The counter starts to count when the selected
trigger input STI is high. The counter stops
counting on the instant, not being reset, when
the STI signal changes its state to a low level.
Both the counter start and stop control are
determined by the STI signal.
The counter starts to count from the original
value in the counter on the rising edge of the
selected trigger input STI. Only the counter
start control is determined by the STI signal.
The rising edge of the selected trigger signal
STI will clock the counter.
September 28, 2018