32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F52342/HT32F52352
Bits
Field
[3:0]
TI3F
Rev. 1.30
Descriptions
Channel 3 Input Source TI3 Filter Setting
These bits define the frequency divided ratio used to sample the TI3 signal. The
Digital filter in the GPTM is an N-event counter where N is defined as how many
valid transitions are necessary to output a filtered signal.
0000: No filter, the sampling clock is f
0001: f
= f
, N = 2
SAMPLING
CLKIN
0010: f
= f
, N = 4
SAMPLING
CLKIN
0011: f
= f
, N = 8
SAMPLING
CLKIN
0100: f
= f
/ 2, N = 6
SAMPLING
DTS
0101: f
= f
/ 2, N = 8
SAMPLING
DTS
0110: f
= f
/ 4, N = 6
SAMPLING
DTS
0111: f
= f
/ 4, N = 8
SAMPLING
DTS
1000: f
= f
/ 8, N = 6
SAMPLING
DTS
1001: f
= f
/ 8, N = 8
SAMPLING
DTS
1010: f
= f
/ 16, N = 5
SAMPLING
DTS
1011: f
= f
/ 16, N = 6
SAMPLING
DTS
1100: f
= f
/ 16, N = 8
SAMPLING
DTS
1101: f
= f
/ 32, N = 5
SAMPLING
DTS
1110: f
= f
/ 32, N = 6
SAMPLING
DTS
1111: f
= f
/ 32, N = 8
SAMPLING
DTS
275 of 656
.
SYSTEM
September 28, 2018
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