Holtek HT32F52342 User Manual page 3

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52342/HT32F52352
Flash Vector Mapping Control Register - VMCR ........................................................................... 62
Flash Manufacturer and Device ID Register - MDID ...................................................................... 63
Flash Page Number Status Register - PNSR ................................................................................ 64
Flash Page Size Status Register - PSSR ...................................................................................... 65
Flash Cache & Pre-fetch Control Register - CFCR ........................................................................ 66
Custom ID Register n - CIDRn, n = 0 ~ 3 ...................................................................................... 67
5 Power Control Unit (PWRCU) .............................................................................. 68
Introduction .......................................................................................................................... 68
Features ............................................................................................................................... 69
Functional Descriptions ....................................................................................................... 69
Backup Domain .............................................................................................................................. 69
V Power Domain .......................................................................................................................... 70
DD
1.5 V Power Domain ....................................................................................................................... 72
Operation Modes ............................................................................................................................ 72
Register Map ....................................................................................................................... 74
Register Descriptions ........................................................................................................... 75
Backup Domain Status Register - BAKSR ..................................................................................... 75
Backup Domain Control Register - BAKCR ................................................................................... 76
Backup Domain Test Register - BAKTEST .................................................................................... 78
Low Voltage / Brown Out Detect Control and Status Register - LVDCSR ..................................... 79
Backup Register n - BAKREGn, n = 0 ~ 9 ..................................................................................... 81
6 Clock Control Unit (CKCU) .................................................................................. 82
Introduction .......................................................................................................................... 82
Features ............................................................................................................................... 84
Function Descriptions .......................................................................................................... 84
High Speed External Crystal Oscillator - HSE ............................................................................... 84
High Speed Internal RC Oscillator - HSI ........................................................................................ 85
Auto Trimming of High Speed Internal RC Oscillator - HSI ............................................................ 85
Phase Locked Loop - PLL .............................................................................................................. 87
Low Speed External Crystal Oscillator - LSE ................................................................................. 89
Low Speed Internal RC Oscillator - LSI ......................................................................................... 89
Clock Ready Flag ........................................................................................................................... 89
System Clock (CK_SYS) Selection ................................................................................................ 90
HSE Clock Monitor ......................................................................................................................... 91
Clock Output Capability .................................................................................................................. 91
Register Map ....................................................................................................................... 92
Register Descriptions ........................................................................................................... 93
Global Clock Configuration Register - GCFGR .............................................................................. 93
Global Clock Control Register - GCCR .......................................................................................... 95
Global Clock Status Register - GCSR ........................................................................................... 97
Global Clock Interrupt Register - GCIR .......................................................................................... 98
PLL Configuration Register - PLLCFGR ........................................................................................ 99
Rev. 1.30 3 of 656 September 28, 2018