Com Complement - Samsung S3C9444 User Manual

8-bit cmos microcontrollers
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S3C9444/F9444_UM_REV1.10
COM
— Complement
COM
dst
dst ← NOT dst
Operation:
The contents of the destination location are complemented (one's complement); all "1s" are
changed to "0s", and vice-versa.
Flags:
C:
Unaffected.
Z:
Set if the result is "0"; cleared otherwise.
S:
Set if the result bit 7 is set; cleared otherwise.
V:
Always reset to "0".
Format:
opc
Examples:
Given: R1 = 07H and register 07H = 0F1H:
COM
COM
In the first example, destination working register R1 contains the value 07H (00000111B). The
statement "COM R1" complements all the bits in R1: all logic ones are changed to logic zeros, and
vice-versa, leaving the value 0F8H (11111000B).
In the second example, Indirect Register (IR) addressing mode is used to complement the value of
destination register 07H (11110001B), leaving the new value 0EH (00001110B).
dst
R1
R1 = 0F8H
@R1
R1 = 07H, register 07H = 0EH
SAM88RCRI INSTRUCTION SET
Bytes
Cycles
Opcode
2
4
4
Addr Mode
(Hex)
dst
60
R
61
IR
6-17

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