Memory Mirrored Channel - Lenovo HX3510-G Installation And Service Manual

Table 12. Normal mode DIMM installation sequence
Number of installed
microprocessor
One microprocessor installed
Two microprocessors installed
For optimal performance:
Make sure all four memory channels of each microprocessor are populated. Each memory channels should
be populated with the same type and amount of memory per channel. Each microprocessor socket should
be populated with the same type and amount of memory per socket. 1DPC (one DIMM per channel) or
2DPC (two DIMM per channel) memory configuration are recommended. Unless there is a need for memory
capacity over memory frequency, 3DPC (three DIMMs per channel) configuration is not recommended since
3DPC configuration forces the memory subsystem to run at a lower frequency (1600 MHz).
Refer to the Understanding and Optimizing Memory Performance for Intel Xeon Processor E5-2600 v3 Series
in IBM Flex System, System x, and BladeCenter Platforms white paper for the detail.

Memory mirrored channel

Memory mirrored channel mode replicates and stores data on two pairs of DIMMs within two channels
simultaneously.
If a failure occurs, the memory controller switches from the primary pair of memory DIMMs to the backup
pair of DIMMs. To enable memory mirrored channel through the Setup Utility, select System Settings ➙
Memory. For more information, see "Using the Setup Utility" on page 35. When you use the memory
mirrored channel feature, consider the following information:
• When you use memory mirrored channel, you must install a pair of DIMMs at a time. The two DIMMs in
each pair must be identical in size, type, and rank (single, dual, or quad), and organization, but not in
speed. The channels run at the speed of the slowest DIMM in any of the channels.
• The maximum available memory is reduced to half of the installed memory when memory mirrored
channel is enabled. For example, if you install 64 GB of memory using RDIMMs, only 32 GB of
addressable memory is available when you use memory mirrored channel.
The following diagram lists the DIMM connectors on each memory channel.
Microprocessor 2
Figure 60. Connectors on each memory channel
The following table shows the installation sequence for memory mirrored channel mode:
132
HX3510-G, HX5510, HX5510-C, HX7510 Installation and Service Guide
DIMM connector population sequence
1, 4, 9, 12, 2, 5, 8, 11, 3, 6, 7, 10
1, 13, 4, 16, 9, 21, 12, 24, 2, 14, 5, 17, 8, 20, 11, 23, 3, 15, 6, 18, 7, 19, 10, 22
CPU2
Channel
Microprocessor 1
CPU1