Reading/Programming The Embedded Flash Memory; Introduction; Read Operation; Instruction Fetch - ST STM32F101xx series Programming Manual

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Reading/programming the embedded Flash memory

2.1

Introduction

This section describes how to read from or program to the STM32F10xxx embedded Flash
memory.
2.2

Read operation

The embedded Flash module can be addressed directly, as a common memory space. Any
data read operation accesses the content of the Flash module through dedicated read
senses and provides the requested data.
The read interface consists of a read controller on one side to access the Flash memory and
an AHB interface on the other side to interface with the CPU. The main task of the read
interface is to generate the control signals to read from the Flash memory and to prefetch
the blocks required by the CPU. The prefetch block is only used for instruction fetches over
the I-Code bus. The Literal pool is accessed over the D-Code bus. Since these two buses
have the same Flash memory as target, D-code bus accesses have priority over prefetch
accesses.
2.2.1

Instruction fetch

The Cortex-M3 fetches the instruction over the I-Code bus and the literal pool
(constant/data) over the D-code bus. The prefetch block aims at increasing the efficiency of
I-Code bus accesses.
Prefetch buffer
The prefetch buffer is 2 blocks wide where each block consists of 8 bytes. The prefetch
blocks are direct-mapped. A block can be completely replaced on a single read to the Flash
memory as the size of the block matches the bandwidth of the Flash memory.
The implementation of this prefetch buffer makes a faster CPU execution possible as the
CPU fetches one word at a time with the next word readily available in the prefetch buffer.
This implies that the acceleration ratio will be of the order of 2 assuming that the code is
aligned at a 64-bit boundary for the jumps.
Prefetch controller
The prefetch controller decides to access the Flash memory depending on the available
space in the prefetch buffer. The Controller initiates a read request when there is at least
one block free in the prefetch buffer.
After reset, the state of the prefetch buffer is on.
The prefetch buffer should be switched on/off only when SYSCLK is lower than 24 MHz and
no prescaler is applied on the AHB clock (SYSCLK must be equal to HCLK). The prefetch
buffer is usually switched on/off during the initialization routine, while the microcontroller is
running on the internal 8 MHz RC (HSI) oscillator.
Note: The prefetch buffer must be kept on (FLASH_ACR[4]='1') when using a prescaler different
from 1 on the AHB clock.
Reading/programming the embedded Flash memory
Doc ID 17863 Rev 1 11/31