Post Max Max; Table 7-7 Post Max Max Output Comparison - Sun Microsystems Blade 1500 Service, Diagnostics, And Troubleshooting Manual

post max normal Output Comparison (Continued)
TABLE 7-6
Output Displayed
/dat/fw/common-source/firmware_re/post/post-build-
4.16.3/Fiesta/taco/integrated
0>Copyright © 2004 Sun Microsystems, Inc. All rights reserved
SUN PROPRIETARY/CONFIDENTIAL.
Use is subject to license terms.
0>OBP->POST Call with %o0=00000800.01012000.
0>Diag level set to MAX.
0>Verbosity level set to NORMAL.
0>Start Selftest.....
0>CPUs present in system: 0
0>Test CPU(s)....Done
0>Interrupt Crosscall....Done
0>Init Memory....Done
0>PLL Reset....Done
0>Init Memory....Done
0>Test Memory....Done
0>Test CPU Caches....Done
0>Functional CPU Tests....Done
0>IO-Bridge Tests....Done
0>INFO:
0> POST Passed all devices.
0>
0>POST: Return to OBP.
7.3.6

post max max

The following is the output of POST with max diagnostic level and max output
verbosity. The duration of POST was 140 seconds. The left column is the output. The
right column is information detailing what is happening. If the POST output you see
from your system does not match that in the left column, use the information in the
right column to help diagnose the problem.
post max max Output Comparison
TABLE 7-7
Output Displayed
ok post max max
@(#)OBP 4.16.3 2004/11/05 18:29 Sun Blade 1500 (Silver)
Clearing TLBs
Executing Power On Self Test
(firmware_re)
What Is Happening
POST build path is displayed.
Copyright and license are
displayed.
CPU0 is acknowledged and POST
configuration is identified.
Testing is started.
CPU is identified and tested.
Interrupt handlers are set up and
checked.
Memory is initialized, phase
locked loops (PLL) are reset,
memory is reinitialized and
tested.
CPU caches are tested.
CPU is tested.
I/O bridge is tested.
POST has passed successfully and
returns control to the OpenBoot
PROM.
What Is Happening
POST is initiated.
OpenBoot PROM resets the
system and starts POST.
Chapter 7 Power-On Self-Test 7-13