Sun Microsystems Blade 1500 Service, Diagnostics, And Troubleshooting Manual page 160

Table of Contents

Advertisement

post max max Output Comparison (Continued)
TABLE 7-7
Output Displayed
0>Test Memory.....
0>Select Bank Config
0>Probe and Setup Memory
0>INFO: 1024MB Bank 0, Dimm Type X4
0>INFO: No memory detected in Bank 1
0>INFO: No memory detected in Bank 2
0>INFO: No memory detected in Bank 3
0>Data Bitwalk on Master
0>
Test Bank 0.
0>Address Bitwalk on Master
0>Addr walk mem test on CPU 0 Bank 0: 00000000.00000000 to
00000000.40000000.
0>Set Mailbox
0>Final mc1 is 10000006.3e581c61.
0>Setup Final DMMU Entries
0>Post Image Region Scrub
0>Run POST from Memory
0>Verifying checksum on copied image.
0>The Memory's CHECKSUM value is 3f81.
0>The Memory's Content Size value is 68111.
0>Success...
Checksum on Memory Validated.
0>Test CPU Caches.....
0>I-Cache RAM Test
0>I-Cache Tag RAM
0>I-Cache Valid/Predict TAGS Test
0>I-Cache Snoop Tag Field
0>I-Cache Branch Predict Array Test
0>Branch Prediction Initialization
0>D-Cache RAM
0>D-Cache Tags
0>D-Cache Micro Tags
0>D-Cache SnoopTags Test
0>W-Cache RAM
0>W-Cache Tags
0>W-Cache Valid bit Test
0>W-Cache Bank valid bit Test
0>W-Cache SnoopTAGS Test
0>P-Cache RAM
0>P-Cache Tags
0>P-Cache SnoopTags Test
0>P-Cache Status Data Test
7-16
Sun Blade 1500 Service, Diagnostics, and Troubleshooting Manual • December 2004
What Is Happening
Memory is probed.
CPU data pins are tested.
Where found, memory is tested.
CPU address pins are tested.
Mailbox register is set.
Memory control register1 is set.
Memory is allocated for POST.
Allocated memory is set to
defaults.
POST is transferred to new
memory and executed.
Copied data is verified.
CPU caches are tested.
Instruction cache is tested.
Data and write caches are tested.
Prefetch cache is tested.

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents