Low-Level Post Code - Sun Microsystems SPARCclassic Service Manual

Low-Level POST Code

When you turn on the system power, the low-level POST is initiated if any of the
following circumstances apply:
4 Keyboard is disconnected.
4 Stop-d keys are held down when you turn on the power.
4 diag-switch? NVRAM parameter is set to True.
The low-level POST code, which is stored in the boot PROM, is designed to test the
most basic functions of the system hardware. The status of the POST is conveyed by
four LEDs on the Type-5 keyboard. The Caps Lock LED flashes on and off to indicate
that the tests are in progress. If a failure is detected during low-level POST, one of
the other three LEDs will light to indicate the nature of the failure. See Chapter 3, for
more information.
If the low-level POST passes, the system probes for SBus devices and interprets their
drivers. Next, a system banner appears on the screen, and the high-level testing
begins. During this time, the screen displays a series of messages that start with the
word Testing. Any problems detected during this phase of testing are indicated
with error messages on the screen. When the high-level POSTs are finished, the
system checks parameters stored in the NVRAM to determine the next step.
Depending on the parameter settings, the system will:
4 Boot the operating system from a specified location
4 Continually cycle through the POST sequence
4 Suppress the boot process and enter the Forth Toolkit (ok prompt)
4 Suppress the boot process and enter the system monitor (> prompt)
Table 2–1 contains a list of NVRAM parameters and explains their effect on the
power-up sequence. For more on NVRAM parameters, see the Open Boot Command
Summary.
Note - At any point during the high-level POST, you can abort the POST process
and access the Forth Toolkit or system monitor by pressing the Stop and "a" keys
simultaneously.
SPARCclassic/SPARCclassic X/SPARCstation LX Service Manual ♦ Revision A, November 1993
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