Nortel Circuit Card Installation Manual page 742

Page 742 of 906
CPU-MUX bus interface
Signal conditioning
Sanity timer
Microprocessor
553-3001-211 Standard 3.00
NTAK20 Clock Controller daughterboard
Holdover and free-run
In the temporary absence of a synchronization reference signal, or when
sudden changes occur on the incoming reference due to error bursts, the clock
controller provides a stable holdover. Free-run mode is initiated when the
clock controller has no record of the quality of the incoming reference clock.
If the command "free run" is given, the clock controller enters the free-run
mode and remains there until a new command is received. Free-run
automatically initiates after the clock controller has been enabled.
A parallel I/O port on the clock controller provides a communication channel
between the clock controller and the CPU.
Drivers and buffers are provided for all outgoing and incoming lines.
The sanity timer resets the microprocessor in the event of system hang-up.
The microprocessor does the following:
• communicates with software
• monitors two references
• provides a self-test during initialization
• minimizes the propagation of impairments on the system clock due to
errors on the primary or secondary reference clocks
Reference Clock Selection
The DTI/PRI card routes its reference to the appropriate line on the
backplane. The clock controller distributes the primary and secondary
references and ensures that no contention is present on the REFCLK1
August 2005