S-Box Performance Monitor Event List - Intel BX80571E7500 - Core 2 Duo 2.93 GHz Processor Programming Manual

I ® X ® P 7500 S
NTEL EON ROCESSOR
NO_CREDIT_HOM
NO_CREDIT_SNP
NO_CREDIT_DRS
NO_CREDIT_NCS
NO_CREDIT_NCB
NO_CREDIT_NDR
NO_CREDIT_VNA
NO_CREDIT_AD
NO_CREDIT_AK
NO_CREDIT_BL
NO_CREDIT_IPQ
2.5.6

S-Box Performance Monitor Event List

This section enumerates Intel Xeon Processor 7500 Series uncore performance monitoring events for
the S-Box.
B2S_DRS_BYPASS
• Title: B-Box to S-Box DRS Bypass
• Category: Ring Bound Enhancement
• Event Code: 0x53, Max. Inc/Cyc: 1,
• Definition: Number of cycles the B-Box to S-Box DRS channel bypass optimization was utilized.
Includes cycles used to transmit message flits and credit carrying idle credit flits.
BBOX_CREDITS
• Title: B-Box Credit Carrying Flits
• Category: Ring Bound Transmission
• Event Code: 0x77, Max. Inc/Cyc: 1,
• Definition: Number credit carrying idle flits received from the B-Box.
BBOX_CREDIT_RETURNS
• Title: B-Box Credit Returns
• Category: System Bound Transmission
• Event Code: 0x6B, Max. Inc/Cyc: 1,
• Definition: Number credit return idle flits sent to the B-Box.
BBOX_HOM_BYPASS
• Title: B-Box HOM Bypass
• Category: System Bound Enhancement
• Event Code: 0x54, Max. Inc/Cyc: 1,
• Definition: B-Box HOM Bypass optimization utilized.
U P
ERIES NCORE ROGRAMMING
Table 2-37. Performance Monitor Events for S-Box Events
Symbol Name
G
UIDE
Event Max
Code Inc/Cyc
0x80 1 HOM Credit Unavailable
0x81 1 SNP Credit Unavailable
0x82 1 DRS Credit Unavailable
0x83 1 NCS Credit Unavailable
0x84 1 NCB Credit Unavailable
0x85 1 NDR Credit Unavailable
0x86 1 VNA Credit Unavailable
0x87 1 AD Credit Unavailable
0x88 1 AK Credit Unavailable
0x89 1 BL Credit Unavailable
0x8A 1 IPQ Credit Unavailable
UNCORE PERFORMANCE MONITORING
Description
2-55