Table 2-79. M_Msr_Pmu_Pld Register - Field Definitions - Intel BX80571E7500 - Core 2 Duo 2.93 GHz Processor Programming Manual

I ® X ® P 7500 S
NTEL EON ROCESSOR
Field
ig
pld_trig_sel
addr_match1
dram_cmd
rtry_sngl_fvid
fvid
cmd
The FVC subcontrol register contains bits to break the FVC_EV into events observed by the Fill and
Victim Control logic (i.e. B-Box commands, B-Box responses, various error conditions, etc). The FVC
register can be set up to monitor four independent FVC-subevents simultaneously. However, many of
the FVC-subevents depend on additional FVC fields which detail B-Box response and commands.
Therefore, only one B-Box response or command may be monitored at any one time.
U P G
ERIES NCORE ROGRAMMING UIDE
Table 2-79. M_MSR_PMU_PLD Register – Field Definitions
HW
Bits Reset
Val
31:14 Reads 0; writes ignored.
15:14 0 When 0, corresponding PMU event records number of ZAD parity errors.
When 1 or 2, respective trigger match event is selected.
13 0 Qualify trigger with address match as specified by
M_CSR_INJ_ERR_ADDR_1. M_CSR_INJ_ERR_CTL_1.match_* and
M_CSR_INJ_ERR_CTL_1.inj_err_* fields control the match condition.
12:8 0 The DRAM command type to be counted.
11110 - ZQCAL_SCMD
11101 - RCR_SCMD
11100 - WCR_SCMD
11000 - NOWPE_SCMD
10111 - SFT_RST_SCMD
10110 - IBD_SCMD
10101 - CKEL_SCMD
10100 - CKEH_SCMD
10011 - POLL_SCMD
10010 - SYNC_SCMD
10001 - PRE_SCMD
10000 - TRKL_SCMD
01111 - GENDRM_SCMD
01110 - EMRS3_SCMD
01101 - EMRS2_SCMD
01100 - NOP_SCMD
01011 - EXSR_SCMD
01010 - ENSR_SCMD
01001 - RFR_SCMD
01000 - EMRS_SCMD
00111 - MRS_SCMD
00110 - CASPRE_WR_SCMD
00101 - CASPRE_RD_SCMD
00100 - CAS_WR_SCMD
00011 - (* undefined count *)
00010 - RAS_SCMD
00001 - PRECALL_SCMD
00000 - ILLEGAL_SCMD
7 0 Controls FVID (Fill Victim Index) selection for which the number of
retries is to be counted.
0 - ALL - All retries are counted, regardless of FVID
1 - FVID - Counts only the retries whose FVIDs match this CSR's fvid
field.
6:1 0 The FVID for which the number of retries is to be counted.
0 0 Uses setting in M_MSR_PMU_ISS.sched_mode to qualify DRAM
commands.
UNCORE PERFORMANCE MONITORING
Reset Type
2-107