Intel BX80571E7500 - Core 2 Duo 2.93 GHz Processor Programming Manual page 146

I ® X ® P 7500 S
NTEL EON ROCESSOR
Name
SnpCur
SnpData
SnpInvItoE
SnpInvOwn
SnpInvXtoI
WbEData
WbEDataPtl
WbIData
WbIDataPtl
WbMtoI
WbMtoE
WbMtoS
WbSData
WcWr
WcWrPtl
U P G
ERIES NCORE ROGRAMMING UIDE
Opc MC
0000 SNP
0010 SNP
1000 SNP
0100 SNP
0101 SNP
0110 DRS
1010 DRS
0100 DRS
1000 DRS
1100 HOM0
1101 HOM0
1110 HOM0
0101 DRS
0001 NCB
1101 NCB
UNCORE PERFORMANCE MONITORING
Gen
By?
Snoop to get data in I state
Snoop Data (get data in E, F or S state)
- Intel Xeon Processor 7500 Series supports getting data
in E or F state
Snoop Invalidate to E state. To invalidate peer caching
agent, flushing any M state data to home
Snoop Invalidate Own (get data in E or M state)
- Intel Xeon Processor 7500 Series supports getting data
in E state
Snoop Invalidate Writeback M to I state. To invalidate
peer caching agent, flushing any M state data to home.
Writeback data, downgrade to E state
Partial (byte-masked) writeback data, downgrade to E
state
Writeback data, downgrade to I state
Partial (byte-masked) writeback data, downgrade to I
state
Write a cache line in M state back to memory and
transition its state to I.
Write a cache line in M state back to memory and
transition its state to E.
Write a cache line in M state back to memory and
transition its state to S.
Writeback data, downgrade to S state
Write combinable write to non-coherent memory mapped
I/O space
Partial write combinable write to non-coherent memory
mapped I/O space
Desc
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