Intel BX80571E7500 - Core 2 Duo 2.93 GHz Processor Programming Manual page 125

I ® X ® P 7500 S
NTEL EON ROCESSOR
Extension
PREALL.TRDOFF
PREALL.RDPRIO
PREALL.WRPRIO
PREALL.ADAPTIVE
RAS
RAS.TRDOFF
RAS.RDPRIO
RAS.WRPRIO
RAS.ADAPTIVE
CAS_RD_OPN
CAS_WR_OPN
CAS_WR_OPN.TRDOFF
CAS_WR_OPN.RDPRIO
CAS_WR_OPN.WRPRIO
CAS_WR_OPN.ADAPTIVE
CAS_RD_CLS
CAS_RD_CLS.TRDOFF
CAS_RD_CLS.RDPRIO
CAS_RD_CLS.WRPRIO
CAS_RD_CLS.ADAPTIVE
CAS_WR_CLS
CAS_WR_CLS.TRDOFF
CAS_WR_CLS.RDPRIO
U P G
ERIES NCORE ROGRAMMING UIDE
PLD Dep
Bits
[12:8]0x1
&& [0]0x1
[12:8]0x1
&& [0]0x1
[12:8]0x1
&& [0]0x1
[12:8]0x1
&& [0]0x1
[12:8]0x2
[12:8]0x2
&& [0]0x1
[12:8]0x2
&& [0]0x1
[12:8]0x2
&& [0]0x1
[12:8]0x2
&& [0]0x1
[12:8]0x3
[12:8]0x4
[12:8]0x4
&& [0]0x1
[12:8]0x4
&& [0]0x1
[12:8]0x4
&& [0]0x1
[12:8]0x4
&& [0]0x1
[12:8]0x5
[12:8]0x5
&& [0]0x1
[12:8]0x5
&& [0]0x1
[12:8]0x5
&& [0]0x1
[12:8]0x5
&& [0]0x1
[12:8]0x6
[12:8]0x6
&& [0]0x1
[12:8]0x6
&& [0]0x1
UNCORE PERFORMANCE MONITORING
ISS Dep
Bits
[9:7]0x0 Count Preall (no auto-precharge, open page mode)
DRAM commands during 'static trade off' scheduling
mode.
[9:7]0x1 Count Preall (no auto-precharge, open page mode)
DRAM commands during 'static read priority'
scheduling mode.
[9:7]0x2 Count Preall (no auto-precharge, open page mode)
DRAM commands during 'static write priority'
scheduling mode.
[9:7]0x2 Count Preall (no auto-precharge, open page mode)
DRAM commands during 'adaptive' scheduling mode.
Count RAS DRAM commands.
[9:7]0x0 Count RAS (no auto-precharge, open page mode)
DRAM commands during 'static trade off' scheduling
mode.
[9:7]0x1 Count RAS (no auto-precharge, open page mode)
DRAM commands during 'static read priority'
scheduling mode.
[9:7]0x2 Count RAS (no auto-precharge, open page mode)
DRAM commands during 'static write priority'
scheduling mode.
[9:7]0x2 Count RAS (no auto-precharge, open page mode)
DRAM commands during 'adaptive' scheduling mode.
Count CAS Read (no auto-precharge, open page mode)
DRAM commands.
Count CAS Write (no auto-precharge, open page
mode) DRAM commands.
[9:7]0x0 Count CAS Write (no auto-precharge, open page
mode) DRAM commands during 'static trade off'
scheduling mode.
[9:7]0x1 Count CAS Write (no auto-precharge, open page
mode) DRAM commands during 'static read priority'
scheduling mode.
[9:7]0x2 Count CAS Write (no auto-precharge, open page
mode) DRAM commands during 'static write priority'
scheduling mode.
[9:7]0x3 Count CAS Write (no auto-precharge, open page
mode) DRAM commands during 'adaptive' scheduling
mode.
Count CAS Read (precharge, closed page mode) DRAM
commands.
[9:7]0x0 Count CAS Read (precharge, closed page mode) DRAM
commands during 'static trade off' scheduling mode.
[9:7]0x1 Count CAS Read (precharge, closed page mode) DRAM
commands during 'static read priority' scheduling
mode.
[9:7]0x2 Count CAS Read (precharge, closed page mode) DRAM
commands during 'static write priority' scheduling
mode.
[9:7]0x3 Count CAS Read (precharge, closed page mode) DRAM
commands during 'adaptive' scheduling mode.
Count CAS Write (precharge, closed page mode) DRAM
commands.
[9:7]0x0 Count CAS Write (precharge, closed page mode) DRAM
commands during 'static trade off' scheduling mode.
[9:7]0x1 Count CAS Write (precharge, closed page mode) DRAM
commands during 'static read priority' scheduling
mode.
Description
2-113