Intel l2ICE Manuals

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Intel l2ICE User Manual

Intel l2ICE User Manual (221 pages)

INTEGRATED INSTRUMENTATION AND IN-CIRCUIT EMULATION SYSTEM

Brand: Intel | Category: Computer Hardware | Size: 5.64 MB

Table of Contents

Table of Contents
5
Preface
13
Revision H Isto Ry
19
Service Information
21
The Microcomputer Development Process
23
Generalized Hardware Design Steps
24
Generalized Software Design Steps
24
An Introduction to the PICE™ System
25
Hardware/Software Integration
25
The Base Configuration of the PICE™ System
26
A Basic PICE™ System
27
PICE™ System O P Tio N S
28
PICE™ System Accessories
29
Hardware Overview
30
The Host Interface Board
30
The Instrumentation Chassis
30
PICE™ System Hardware Components
31
The Emulation Base Module
32
Emulation Personality Modules
33
High-Speed Memory
33
Optional High-Speed Memory Board
33
System Interface Cables
33
The Intel Logic Timing Analyzer (Ilta)
33
Software Environment
34
Software Overview
34
The PICE™ System Debugging Capabilities
35
The PICE™ System Command Language
36
The PICE™ System Diagnostic Disk
37
The PICE™ System Error/Help Disk
37
The PICE™ System Host Disk(S)
37
The PICE™ System Probe Disks
37
The PICE™ System Software
37
The Ilta Disks
38
The PICE™ System Tutorial D Isk(S)
38
The PSCOPE-86 Disk
38
Host Requirements
39
PICE™ System Specifications
39
System Performance
40
Emulation Clips
41
PICE™ System Emulation Clips-DC Characteristics
41
The Target System User Interfaces
41
Chapter 2 Guide to the Pice™ System Tutorial

43
- Tutorial Use
  43
- Invoking the Tutorial During Program Debugging
  44
- Deactivating the Tutorial
  44
- Reactivating the Tutorial
  44
- Tutorial Screens and Structure
  44
- Copies of Selected Tutorial Screens
  46
- An Overview of the Tutorial Structure
  47
- List of All Tutorial Screens
  48
- Tutorial Structure
  51
- Tutorial Index
  55
- Tutorial Program Listings
  58
- Overview of the PL/M Tutorial Program
  58
- M Program Listing for the Two-Bug Version of the Change Maker Program
  59
- The ASM-86 Listing for the No-Bug Version of the Change Maker Program
  63
- Sample Programs in C, FORTRAN, and Pascal
  72
- A Change Maker Program in C
  73
- A Change Maker Program in FORTRAN
  74
- A Change Maker Program in Pascal
  75
- Invoking PICE™ S Oftw Are
  77
- Entering PICE™ System Com Mands
  79
- Extending a Command to Another Line
  79
- Aborting Commands
  79
- Multiple Commands on a Line
  80
- Comments
  80
- The Command Line Editor
  80
- The PICE™ System Syntax M E N U
  80
- The PICE™ Command History Buffer
  81
- String Handling
  82
- Block Commands
  83
- Creating Debug Objects
  84
- Creating a Debug Procedure
  84
- Creating a LITERALLY Definition
  85
- Creating a Debug Register
  85
- Creating a Debug Variable
  85
- The PICE™ Screen Editor
  86
- Inserting Text
  86
- Deleting and Moving Text
  87
- Viewing Text
  87
- Overwriting Text
  87
- Editing External Files
  87
- Exiting the Screen Editor
  88
- File Handling
  88
- List Files
  88
- INCLUDE Files: the INCLUDE, PUT, and APPEND Commands
  89
- The LOAD and SAVE Commands
  90
- Memory Types
  91
- Debug Variables
  92
- Program Variables and Symbolic Debugging
  92
- Program Variables and the PICE™ Memory Types
  94
- Managing the Memory and I/O Spaces
  94
- The PICE™ Memory M a P
  95
- Mapping Input/Output
  97
- Simulating I/O from the Console
  98
- Simulating I/O with a Debug Procedure
  99
- System Parameters Used with I/O Debug Procedures
  99
- The Emulation Clips
  101
- The Clipsin Lines
  101
- The Clipsout Lines
  101
- Emulating a Program
  102
- Preparing a Pascal Program
  102
- Compiling the Source File
  103
- Linking the Object File
  103
- Locating the Link File
  103
- Creating a SUBMIT File
  103
- Getting Ready to Emulate
  104
- Emulating Your Program
  106
- Breaking, Tracing, and Arming
  109
- The Example
  109
- Emulating a User Program
  110
- The Event Machines
  111
- The Debug Registers
  111
- Arm R Egisters
  112
- Break Registers
  112
- System Registers
  112
- Trace R Egisters
  113
- Event Registers
  113
- Debug Registers Calling Debug Procedures
  113
- Interpreting the Trace Buffer
  114
- The Timetag
  118
- The Pseudo-Variable TRCBUS
  118
- Trace Buffer Information
  119
- Hardware Slipping on a Breakpoint
  119
- Even Addresses, Odd Addresses, and Breaking
  120
- Word Writes to Even and Odd Addresses
  120
- Byte Writes to Even and Odd Addresses
  123
- Word Reads from Even and Odd Addresses
  124
- Byte Reads from Even and Odd Addresses
  127
- Moving the User Cable
  130
- The 8086/8088 Probe
  133
- Hardware and Software Considerations for the 8086/8088 Probe
  134
- Address Wrap-Around
  134
- Break Information
  135
- READY Signal Set-Up Time
  136
- Request/Grant L in E
  136
- Non-Maskable Interrupt Line and Interrupt Line
  136
- Non-Maskable Interrupts and Program Stepping
  136
- Synchronization Betw Een the Prototype and the Probe
  136
- U Ser-A Ccessible Test Points
  136
- Coprocessor Considerations
  138
- Inability to Break When RESET Is Asserted
  138
- Getting a User NMI While in Emulation Mode
  138
- Using the PICE™ System as a Signal Generator
  138
- 10-Mhz 8086 Probe MAX Mode Operation
  139
- Probe MIN Mode Operation
  139
- Address/Data Bus Float
  139
- The 80186/80188 Probe
  139
- Hardware and Software Considerations for the 80186/80188 Probe
  140
- Address Wrap-Around
  141
- Break Information
  141
- Mapping Considerations for the 80186/80188 Probe
  142
- Synchronization between the Prototype and the Probe
  143
- User-Accessible Test Points
  143
- User Socket
  144
- The 80286 Probe
  144
- Address Translation
  145
- Multitasking
  148
- Interrupts
  149
- Address Protection
  149
- Real Mode and PCHECK
  150
- Protected Mode and PCHECK
  150
- Memory Mapping for the 80286 Probe
  150
- Support for Processor Extensions
  151
- Displaying 80286 Registers and Flags
  151
- Real Mode and PCHECK = TRUE
  151
- Real Mode and PCHECK = FALSE
  151
- Protected Mode and PCHECK = TRUE
  151
- Protected Mode and PCHECK = FALSE
  152
- Hardware and Software Considerations for the 80286 Probe
  152
- Hardware Slipping Past a Breakpoint
  152
- High-Address Bits Override
  152
- Issuing a Reset Command When an 80287 Is Present
  154
- Resetting the 80286 Chip and the 80286 Probe
  156
- Timing Differences between the Iapx 286 and the 80286 Probe
  156
- User Substrate Capacitor and + 5 Volt Source
  156
- Tracing Considerations
  157
- User Socket
  157
- Synchronizing Emulation to an External Event
  157
- Using the Initialization Segment
  157
- Reading from and Mapping to Mapped Memory or I/O
  158
- Coprocessor Support
  159
- Mapping Restrictions When Using Coprocessors
  159
- The PHANG Pseudo-Variable
  159
- The 8087/80287 Numeric Data Processors
  159
- The COENAB Pseudo-Variable
  160
- Coprocessor Pseudo-Variable Interaction
  160
- COENAB and an External Coprocessor
  161
- COENAB and an Internal Coprocessor
  161
- The CPMODE Pseudo-Variable
  161
- The COREQ Pseudo-Variable
  162
- The GET87 Command
  162
- Multiple-Probe Systems
  163
- Arming the PICE™ System
  164
- Asserting the System Break and Trace Lines
  165
- Enabling PICE™ System Units
  165
- Symbolic Support for Multiple Probes
  166
- Writing Debug Procedures for Multiple Probe Systems
  167
- Synchronization between Units
  168
- The 8086/8088 and 80186/80188 Probes
  168
- The 80286 Probe
  169
- The PICE™ System Instrumentation Chassis Installation
  171
- Emulation Base Module Installation
  174
- Buffer Base Assembly Jumpering
  174
- Installing Personality Modules and User Cables
  174
- Jumpering for 8087 Support
  177
- Installing the 8086/8088 User Cable
  180
- Installing the PICE™ System 80186/80188 Emulation Personality Module
  181
- Installing the 80186/80188 User Cable
  184
- Installing the PICE™ System 80286 Emulation Personality Module
  186
- Installing the 80286 User Cable
  186
- Installing the Emulation Clips Module
  188
- Installing the Ilta Logic Timing Analyzer Option
  190
- Host Installation Information
  190
- Creating a CRT File
  193
- Configuration Commands
  194
- The AF Configuration Command Values
  196

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