Related Manuals for Intel BX80580Q9400 - Core 2 Quad 2.66 GHz Processor
Summary of Contents for Intel BX80580Q9400 - Core 2 Quad 2.66 GHz Processor
- Page 1 ® Intel Core 2 Duo Processor ® and Intel GS45 Express Chipset (with DDR3 System Memory) Development Kit User’s Manual September 2008 Document Number: 320503-001...
- Page 2 Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com.
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Page 3: Table Of Contents
Contents About This Manual ....................8 Content Overview...................8 Text Conventions ...................9 Glossary of Terms and Acronyms ............10 Development Kit Technical Support ............14 1.4.1 Online Support................14 1.4.2 Additional Technical Support .............14 Related Documents................15 1.5.1 Ordering Hard Copies of Documents...........15 Getting Started....................17 Overview ....................17 Development Kit Contents ..............17 Additional Required Hardware (Not Included in the Development Kit)...18 Additional Required Software (Not included in the Development Kit) .... - Page 4 Rework to change Eaglemont Card from HDMI to Display Port..63 A.3.2 AUX Pull Down Rework.............65 Intel® High Definition Audio Interposer Card (Mott Canyon 4) (Not Included)66 A.4.1 Mott Canyon 4 Jumper Settings ..........67 ExpressCard Module Interposer (Duck Bay 3) (Not Included) ......69 PCI Express mini card Interposer (Upham IV) (Not Included) ......70...
- Page 5 Appendix C Programming System BIOS Using a Flash Programming Device ......77 Appendix D CPU Thermal Solution (Heatsink) Installation ............78 Figures Figure 1. Fern Hill Block Diagram ..............26 Figure 2. Fern Hill Development Board Components ..........49 Figure 3. Back Panel Connectors ...............51 Figure 4.
- Page 6 Table 1. Text Conventions ..................9 Table 2. Definitions of Terms ................10 Table 3. Acronyms ..................11 Table 4. Related Documents ................15 Table 5. Intel Literature Centers................15 Table 6. Fern Hill Feature Set Summary .............27 Table 7. TV–Out Connections ................34 Table 8. PCI Express Ports................35 Table 9.
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Page 7: Revision History
Revision History Document Revision Description Revision Date Number Number 320503 Public launch release Sept. 2008 § Development Kit User’s Manual... -
Page 8: About This Manual
About This Manual About This Manual ® This user’s manual describes the use of the Intel Core 2 Duo Processor (LV and ® ULV) and Intel GS45 Express Chipset development kit with DDR3 SDRAM system memory. This manual has been written for OEMs, system evaluators, and embedded system developers. -
Page 9: Text Conventions
The chapter also explains the use of the programming headers. Appendix A, “Add-In Cards” – This appendix contains information on add-in cards available from Intel that can be used with the development board. Appendix B, “Rework Instructions” – This appendix contains rework instructions for the development board and for some of the add-in cards to enable additional supported features and functionality. -
Page 10: Glossary Of Terms And Acronyms
The name of the development board that uses Intel Core™ 2 Duo ® processor SU9400 or SL9400 with the Mobile Intel GS45 Express Chipset (Small Form Factor) and DDR3 SDRAM Infrared Data The Infrared Data Association (IrDA) has outlined a specification for serial Assoc. -
Page 11: Table 3. Acronyms
Core™ 2 Duo ® processor with the Mobile Intel GM45 Express Chipset and DDR2 SDRAM The contact point of a component package to the traces on a substrate, such as the motherboard. Signal quality and timings may be measured at the pin. - Page 12 Full-speed. Refers to USB Front Side Bus Firmware Hub Gigabit Ethernet GLCI Gigabit LAN Connect Interface GS45 Intel® GS45 Express Graphics and Memory Controller Hub GMCH Graphics and Memory Controller Hub Ground (VSS) GPIO General Purpose Input/Output High Definition Audio...
- Page 13 About This Manual Acronym Definition Integrated Drive Electronics IMVP-6 or (Intel MVP-6) Intel Mobile Voltage Positioning – revision 6 Input / Output IrDA Infrared Data Association Integrated Test Port Keyboard Controller Level-2 (Cache) Local Area Network Light Emitting Diode Low Pin Count Low-speed.
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Page 14: Development Kit Technical Support
This information is available 24 hours per day, 7 days per week, providing technical information whenever you need it. 1.4.2 Additional Technical Support If you require additional technical support, please contact your Intel Representative or local distributor. Development Kit User’s Manual... -
Page 15: Related Documents
It is also usually the first 6 digits of the name of the PDF file, such as: 12345612.pdf. 2. Call or E-mail a Request Call: To place an order for a publication or text in hardcopy or CD form, please contact the Intel Literature Fulfillment Centers listed in Table Table 5. Intel Literature Centers Location Telephone Number U.S. - Page 16 About This Manual Email: To order a publication or text in hardcopy or CD form, send your request to: intelsupport@hibbertgroup.com Please make sure to include in your e-mailed request: SKU # Company Name Your Name (first, last) Full mailing address Daytime Phone Number in case of questions Note: Please be aware not all documents are available in all media types.
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Page 17: Getting Started
Fern Hill. This manual will cover the features and details of the Fern Hill development board. Note: The Intel® Core™ 2 Duo SU9400 processor at 1.4 GHz core frequency is not on the Intel embedded roadmap offering and as such does not have embedded market 7 year availability. -
Page 18: Additional Required Hardware (Not Included In The Development Kit)
Pre-assembled development system, which includes: • Fern Hill development board Plexiglass stand with Acrylic pad Mounting screws and standoffs ® Intel Core 2 Duo processor SU9400 or SL9400 Processor thermal solution and CPU back plate ® Intel GS45 Express Chipset Graphics and Memory Controller Hub... -
Page 19: Additional Required Software (Not Included In The Development Kit)
Getting Started Hard Drives and Optical Disc Drives and cables: One SATA hard disk drive and one SATA optical DVD Drive are included in the development kit. Up to four SATA drives and two IDE devices (master and slave) may be connected to the development board. -
Page 20: Workspace Preparation
Getting Started Workspace Preparation Caution: The development kit is shipped as an open system to provide flexibility in changing hardware configurations and peripherals in a lab environment. Since the board is not in a protective chassis, the user is required to take the following safety precautions in handling and operating the board. -
Page 21: System Setup And Power-Up
J1H1 or J1H2. Do not mix mobile and desktop power configurations. 7. Plug in the power cord of the ATX power supply or the Intel AMPS AC brick into a standard 120 V or 240 V AC power outlet. -
Page 22: Using The Ac To Dc Power Supply (Mobile Power Mode)
Getting Started Powering up the board: 1. Switch the power supply on (1) at the switch on the rear of the supply. 2. Press the power button located at SW1C1. 3. As the system boots, press F2 to enter the BIOS setup screen. 4. -
Page 23: Power Down
System BIOS A version of the AMI* BIOS is pre-loaded on the development board. Other BIOS vendors also support the Intel Core 2 Duo with Intel GS45 Express Chipset. For additional BIOS support, please contact your BIOS vendor. 2.8.1... -
Page 24: Programming Bios Using A Bootable Usb Device
Getting Started 2.8.2 Programming BIOS Using a Bootable USB Device The flash chips which store the BIOS and BIOS extensions on the development board are connected to the SPI bus and are soldered down. One method of programming these devices is through software utilities as described below. The software files and utilities needed to program the BIOS are contained on the included CD-ROM. - Page 25 Getting Started From DOS, Run the following to reprogram the MAC address: a) eeupdate /nic=1 /mac=xxxxxxxxxxxx (xxxxxxxxxxxx is the MAC Address from the sticker) b) Make sure there are no warnings or errors From DOS, Run the following to update the Keyboard and System Controller flash: a) kscupdate ksc.bin b) Make sure there are no warnings or errors...
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Page 26: Development Board Features
Development Board Features Development Board Features Block Diagram Figure 1. Fern Hill Block Diagram GS45 GMCH ICH9M-E SFF Mechanical Form Factor The development board conforms to the ATX form factor. The development board will fit in most standard ATX chassis. A list of add-in card connector and slot locations is provided in Section 4.1 Internal and rear panel system I/O connectors are described in Section 4.2. -
Page 27: Table 6. Fern Hill Feature Set Summary
(muxed with one PCIe lane) One x16 connector x2 PCIe lanes to docking via resistor stuffing option The Intel® 82567 Gigabit Ethernet LAN The Intel 82567 is connected to ICH9M SFF On-Board LAN via LCI interface and GLCI interface Development Kit User’s Manual... - Page 28 Supports two compatible flash device BIOS (SPI) Support multi-package (SOIC-8 & SOIC-16) device No FWH connector on motherboard Support for 8-Mb Intel FWH using Port- 80 card BIOS (FWH) Support only through Port-80 add-in card (through the TPM header) Support via interposer Intel®...
- Page 29 11 for Intel® Management Engine JTAG LAI support Intel® Active Management Technology Controller Link to GMCH and to wireless LAN (Intel® AMT) is supported on the CRBs Intel® Management Engine power plane IAMT® support with M0 M1, and M-off management states Intel®...
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Page 30: Software Key Features
While every care was taken to ensure the latest versions of drivers were provided on the enclosed CD at time of publication, newer revisions may be available. Updated drivers for Intel components can be found at: http://downloadcenter.intel.com For all third-party components, please contact the appropriate vendor for updated drivers. -
Page 31: Thermal Management
FCBGA (Flip Chip Ball Grid Array) package at board location U2E1. Note: The Intel® Core™ 2 Duo SU9400 processor at 1.4 GHz core frequency is not on the Intel embedded roadmap offering and as such does not have embedded market 7 year availability. -
Page 32: Processor Voltage Regulators
3.6.4 Processor Power Management Intel® Core™ 2 Duo processor SL9400 and SU9400 supports C0-C6 power states. This processor also supports C2E and C4E. Additionally, the processor supports a new processor state, Intel Deep Power Down Technology, that brings the CPU leakage power down to the lowest possible. -
Page 33: Chipset
USB ports and one port to docking), 4 Serial ATA channels (Two cable connects, one direct connect, one eSATA port) , an Intel HD Audio digital link, PCI 2.3 compliant interface (no slots on board, slots provided on thimble peak card), LPC bus, six general purpose PCI Express 1.1a compliant lanes in which sixth PCI Express lane... -
Page 34: Video Display
Development Board Features 3.6.9 Video Display The reference board has six options for displaying video: VGA, LVDS, TVOUT, SDVO, Display port (through Add in card) or PCI Express Graphics (PEG). Display port, SDVO and PCI Express Graphics (PEG) are multiplexed on the same pins within the chipset. The development board contains one DP/SDVO/PCI Express Graphics Slot (J6B2) for a PCI Express compatible graphics card or an SDVO compatible graphics card (ADD2N &... -
Page 35: Pci Slots
I/O Controller Hub through the LAN Connect Interface (LCI) and supports 10/100Mbps link. The same device is connected through GLCI interface and supports 1000Mbps link. The Intel 82567 connects to an RJ45 connector at J5A1 with built in magnetic decoupling. -
Page 36: Serial Peripheral Interface (Spi)
Intel® High Definition Audio functionality is enabled through the Mott Canyon 4 Daughter Card. ICH9M-E SFF supports 4 Intel® High Definition Audio codecs. All the four are routed to MDC header through resistor stuffing option. By default Codec 0 & 1 will be connected to MDC Card. -
Page 37: Usb Connectors
Development Board Features Table 10. SATA Ports SATA Port Connection Type Connector Port 0 Direct Connect J8J1 Port 1 & Port 4 Cable Connect J6J3 & J6J2 Port 5 eSATA J7J1 These connectors mentioned in Table 10 are for the serial data signals. The board has a power connector J5J1 to power the serial ATA hard disk drive. -
Page 38: Lpc Super I/O (Sio)/Lpc Slot
It should be noted that the development board does not include an Intel 82802 Firmware Hub Device. Intel 82802 Firmware Hub Device support is provided through the TPM header (J9A1). A Port 80 card with an Intel 82802 Firmware Hub Device assembled can be used. -
Page 39: System Management Controller (Smc)/Keyboard Controller (Kbc)
Development Board Features 3.6.20 System Management Controller (SMC)/Keyboard Controller (KBC) A Renesas* H8S/2117 (U9G2) serves as both System Management Controller (SMC) and Keyboard Controller (KBC) for the development board. The SMC/KBC controller supports two PS/2 ports, battery monitoring and charging, wake/runtime SCI events, CPU thermal monitoring/Fan control, GMCH thermal throttling support, LPC docking support and power sequencing control. -
Page 40: Power Supply Solution
FSP300-60BTVS meets this requirement and is an ATX12V 1.1 Spec compliant power supply. Note: This development board uses the Intel AMPS solution for AC brick. For more details refer to Intel® Adaptive Mobile Power System (Intel® AMPS) White Paper (Doc... -
Page 41: Debug Interfaces
ITP converter cable is necessary to use the older ITP tools. Also, in some cases a resistor change rework is necessary to get the older ITP tools to function properly. Please contact an Intel representative for additional details. 3.6.27 Board Form-Factor The reference board form factor is similar to the full-size ATX specification. -
Page 42: Testability
ITP interface as well. The user must use an XDP or ITP interface that is compatible with the Intel® Core™ 2 Duo processor SL9400 and SU9400 Note: The XDP interface is backwards compatible with the ITP interface. However, an XDP to ITP converter cable is necessary to use the older ITP tools. -
Page 43: Table 14. Digital Multi-Meter Comparison
Development Board Features Table 14. Digital Multi-Meter Comparison EXAMPLE SYSTEM Sense Resistor Value: 0.002Ω Voltage Difference Across Resistor: 1.492 mV (746 mA) Calculated Power: 1.113 mW Agilent 34401A (6 ½ digit display) Fluke 79 (3 digit display) Specification: (±0.0030% of reading) Specification: ±0.09% ±2 digits + (±0.0030% of range) - Page 44 Development Board Features Component/ Voltage Supply Rail Reference Interface Plane Designator GMCH VR 1.05 V 51124_LL1_L +V1.05M R4G4 GMCH 1.05 V +V1.05M +VCC_GMCH R5R5 GMCH VCCP +V1.05M +VCCP_GMCH R4F1 (1.05 V) GMCH 1.05 V +V1.05M +V1.05M_PEG_LR R6E2 GMCH 1.05 V +V1.05M +VCC_DMI R5T1...
- Page 45 Development Board Features Component/ Voltage Supply Rail Reference Interface Plane Designator 3.3 V +V3.3M_WOL +V3.3M_VCCPAUX R7F2 3.3 V +V3.3S +V3.3S_PCI_ICH R7F4 3.3 V +V3.3S +V3.3S_SATA_ICH R7G10 Memory 1.5 V +V1.5 +V1.5_DIMM1 R5C3 Memory 1.5 V +V1.5 +V1.5_MD R5B4 Memory 3.3 V +V3.3M +V3.3M_DIMM0 R3C7 (0.022Ω)
- Page 46 Development Board Features Component/ Voltage Supply Rail Reference Interface Plane Designator CK505 1.05 V +V1.05M +VDDIO_CLK R5V8 3.3 V +V3.3 +V3.3_LPCSLOT R8F1 +V5_LPCSLOT R8E3 +V5_R1_TPM R9M1 3.3 V +V3.3S +V3.3S_R1_TPM R9M2 3.3 V +V3.3A +V3.3A_R1_TPM R9A5 3.3 V +V3.3A +V3.3A_KBC R8H8 +V5_PS2 R1A1...
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Page 47: Power Supply Usage And Recommendation
Development Board Features 3.10 Power Supply Usage and Recommendation Do not use non-Sparkle ATX power supplies. Only use Sparkle ATX Desktop Power Supplies. As the Desktop ATX supplies grew to meet the increased power for those Motherboards, their minimum loading requirements also grew. When you try to run a mobile platform on it, it may not load the 5.0V rail enough to meet the minimum loading requirements for it to maintain regulation. -
Page 48: Development Board Physical Reference
Development Board Physical Reference Board Components The following figure shows the major components of the Fern Hill development board. Document Number: 320249-001... -
Page 49: Figure 2. Fern Hill Development Board Components
Development Board Physical Reference Table 16 gives a brief description of each component. Figure 2. Fern Hill Development Board Components Development Kit User’s Manual... -
Page 50: Table 16. Development Board Components
Development Board Physical Reference Table 16. Development Board Components Components Detail Components Detail Components Detail Chipset VR EU5G1 SPI flash 1 U8C4 Battery B J1H2 Connector Trusted Platform J9A1 SMC/KBC J1A1 Battery A J1H1 Module Connector 82567 LAN controller EU8A1 Manufacturing J9J1 Memory Down... -
Page 51: Connectors
Development Board Physical Reference Connectors Caution: Many of the connectors provide operating voltage (+5V DC and +12V DC, for example) to devices inside the computer chassis, such as fans and internal peripherals. Most of these connectors are not over-current protected. Do not use these connectors for powering devices external to the computer chassis. -
Page 52: Figure 4. D-Connector To Component Video Cable
Development Board Physical Reference Figure 4. D-Connector to Component Video Cable Figure 5. D-Connector to Composite Video Cable Figure 6. D-Connector to S-Video Cable Development Kit User’s Manual... -
Page 53: Configuration Settings
Development Board Physical Reference Configuration Settings 4.3.1 Configuration Jumpers/Switches Caution: Do not move jumpers with the power on. Always turn off the power and unplug the power cord from the computer before changing jumper settings. Else, it may damage the board. -
Page 54: Table 17. Configuration Jumpers And Switches Settings
1-2, 3-4 J3J2 Power ON Latch 1-X (Normal 1-2 Latch the power Operation) J4H1 No Intel Management 1-2 Jump power Engine G3 to M1 support state from G3 to M1 J4J2 SATA Power Enable 1-2 (Hot plug/removal 1-X Hot plug not... - Page 55 Development Board Physical Reference Reference Default Optional Designator Description Setting Setting Operation) J8G4 SMC MD2 1-2 Advanced Single chip mode J8G5 CRB/SV Detect 1-X (CRB) 1-2 SV J8G6 SMC MD1 1-2 (Normal Operation) 1-X No external Programming J8G7 KBC disable 1-X (KBC enabled 1-2 KBC disbled J8H1...
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Page 56: Bsel Jumper Settings
Development Board Physical Reference 4.3.2 BSEL Jumper Settings The jumper settings in Table 18 are provided to accommodate frequency selection for the processor. Table 18. BSEL Jumper Settings Processor Intel® Core™ 2 Duo processor SL9400 or SU9400 J1G5 J1G3 Driven J1G1 J1G5... -
Page 57: Net Detect Button
Development Board Physical Reference Figure 8. Power On and Reset Buttons Power Button (SW1C1) Reset Button (SW1C2) CPU (U2E1) Net Detect Button The board has one Net Detect push button switch (SW8E1) to support wireless LAN network detection in S0-S5. This button is connected on the SMC/KBC GPIO. When pressed, a manageability wake event is signaled to the ICH9M-E SFF via SMC/KBC, manageability planes are powered, and the 82567 wireless LAN performs the network detection. -
Page 58: Leds
Development Board Physical Reference LEDs The following LEDs provide status of various functions on the development board. Table 20. LEDs Reference Function Designator Keyboard number lock CR9G1 Keyboard scroll lock CR9G3 Keyboard caps lock CR9G2 System State S0 CR5H4 System State S3 CR5H6 System State S4 CR5H7... -
Page 59: Other Headers
Development Board Physical Reference Other Headers 4.7.1 H8 Programming Headers The microcontroller firmware for system management/keyboard/mouse control can be upgraded in two ways. The user can either use a special DOS* utility (in-circuit) or use an external computer connected (remote) to the system via the serial port on the board. -
Page 60: Sideband And Test Headers
Development Board Physical Reference Table 21. H8 Programming Jumpers Jumper Reference Default Stuffing Option Programming Stuffing Option Designator J7A1 Remote H8 2-3 – link the Host Unit to On Board 1-2 – normal operation Programming J8B2 Boot Block 1-2 (IN) – normal OUT –... -
Page 61: Appendix A Add-In Cards
Of the add-in cards described in this appendix, only the Port 80-83 Card, PCI Expansion Card (Thimble Peak 2) and the HDMI and Display Port Video Interface Card (Eaglemont) are included in the development kit. Contact your Intel Representative to obtain cards not included in the kit. -
Page 62: Pci Expansion Card (Thimble Peak 2) (Included)
Add-In Cards PCI Expansion Card (Thimble Peak 2) (Included) The PCI Expansion Card (Thimble Peak 2) is provided to offer 3 PCI slots and one goldfinger PCI slot on the evaluation board. The expansion card also contains a floppy disk drive connector, parallel port connector, and a serial port connector. To connect the card, slide the horizontal PCI connector on Thimble Peak 2 onto the gold-fingers on the development board. -
Page 63: Rework To Change Eaglemont Card From Hdmi To Display Port
Add-In Cards Figure 12. Eaglemont Add-in Card A.3.1 Rework to change Eaglemont Card from HDMI to Display Port Note: All rework should use lead-free solder in order to keep the board RoHS compliant. 1. Resistors R5D7, R5D5, R5D3, R5C19, R5C16, R5C12, and R5C11 need to be taken off and placed in the ref des. -
Page 64: Figure 13. Location Of Resistors For Rework (Before Rework)
Add-In Cards Figure 13. Location of Resistors for Rework (before Rework) Figure 14. Location of Resistors for Rework (after Rework) 2. On the mid/upper left hand section of Eaglemont card, resistor locations R5B22, R5B19, R5B18, R5B16, R5B14, R5B11, R5B9, and R5B6 can be identified. -
Page 65: Aux Pull Down Rework
Add-In Cards Figure 15. Location of Resistors for Rework A.3.2 AUX Pull Down Rework. All Eaglemont cards (both Fab1 and Fab2) as delivered from the factory have 100 kΩ pull-up resistors on AUXP and AUXN. These cards should be re-worked so that there are 100 kΩ... -
Page 66: Intel® High Definition Audio Interposer Card (Mott Canyon 4) (Not Included)66
Intel® High Definition Audio Interposer Card (Mott Canyon 4) (Not Included) The Mott Canyon 4 (MC4) Interposer Card is provided to enable Intel® High Definition Audio (Intel® HD Audio) and modem functionality on the development board. Mott Canyon 4 provides two 30-pin MDC1.0 connectors and one 12-pin MDC1.5 connector, supporting up to two Intel HD Audio codecs simultaneously. -
Page 67: Mott Canyon 4 Jumper Settings
The Mott Canyon 4 Interposer has the ability to select either Primary or Secondary Intel HD Audio functionality for MDC0 and MDC1 connectors with two jumper options, J16 and J25. See the Table 22 below for details. MDC2 supports an Intel® High Definition Audio modem-only codec. -
Page 68: Table 22. Mott Canyon 4 Configuration Jumper/Switches Settings
Add-In Cards Table 22. Mott Canyon 4 Configuration Jumper/Switches Settings Description Default Setting Optional Setting Reference Designator 3-4 for MDC0 codec B ACZ_SD_0 1-2 for MDC0 codec 5-6 for MDC1 codec A Destination (MDC-0- 7-8 for MDC1 codec B 1-2) 9-10 for MDC2 codec A 1-2 for MDC0 codec A ACZ_SD_1... -
Page 69: Expresscard Module Interposer (Duck Bay 3) (Not Included)
Add-In Cards ExpressCard Module Interposer (Duck Bay 3) (Not Included) The Duck Bay 3 Interposer Card is a modular add-in card based on the PCI Express and USB interfaces. Duck Bay 3 is provided to enable both 34 mm and 54 mm ExpressCard functionality on the development board. -
Page 70: Pci Express Mini Card Interposer (Upham Iv) (Not Included)
Add-In Cards PCI Express mini card Interposer (Upham IV) (Not Included) The Upham IV board plugs into the PCI Express slots on The development board. It supports the attachment of two independent PCI Express mini cards (Complied with Express mini card specification Rev1.0) with USB connection enabled for each. The USB interface is implemented using a separate cabling scheme. -
Page 71: Docking Connector Card (Saddlestring Ii) (Not Included)
Add-In Cards Table 23. Upham IV default Jumper/Switches Settings Jumper Ref Default Description Other options Setting J1B1 Power to BT LDO Open (1-X) – Power Disabled from USB J4C1 Channel data to Slot2 Closed (1-2) – Enable slot 2 Channel Data to BT through Opamp J2C1 H/W Shutdown for BT... -
Page 72: Figure 20. Saddlestring Ii Docking Connector
Add-In Cards Figure 20. Saddlestring II Docking Connector Please refer to the Saddlestring II Fab 1 Users Guide for details on using each of these interfaces and reworks that may be required on the board. The below table describes the reworks required for routing Display Port to the Docking station Note: All rework should use lead-free solder in order to keep the board RoHS compliant. -
Page 73: Table 24. Board Rework To Support Display Port On Saddlestring
Add-In Cards Table 24. Board Rework to Support Display Port on Saddlestring STUFF UNSTUFF Description CAPC,X5R,0402,10V,10%,0.1uF. To disconnect TX11# C6C11 IPN : A36096-043 from MCH to PEG CAPC,X5R,0402,10V,10%,0.1uF. To disconnect TX11 from C6C13 IPN : A36096-044 MCH to PEG CAPC,X5R,0402,10V,10%,0.1uF. To disconnect TX10# C6C15 IPN : A36096-045... -
Page 74: Appendix B Rework Instructions
Rework Instructions Appendix B Rework Instructions Internal HDMI Enabling Note: All rework should use lead-free solder in order to keep the board RoHS compliant. Follow the instructions below to enable Internal HDMI 1. Unstuff R5T10. Figure 21. iHDMI Rework Instruction 1 2. -
Page 75: Enabling External Hdmi
Rework Instructions Enabling External HDMI If using an external HDMI codec, depending on the configuration: Stuff R7G3, R7G2, R7V8, R7G11 and one of R9E13 or R9E10 depending on the add-in card and NoStuff R7V24,R7V8,R7V3,R7V4,R5F7,R9E14,R9E12 ,R9E8 Note: All rework should use lead-free solder in order to keep the board RoHS compliant. Support for Upham 4 Stuff R8B5 and R7C1 Note: All rework should use lead-free solder in order to keep the board RoHS compliant. -
Page 76: Figure 24. Low Voltage Hd Audio Rework (Sus Rail)
Rework Instructions Figure 24. Low Voltage HD Audio Rework (Sus Rail) § Development Kit User’s Manual... -
Page 77: Appendix C Programming System Bios Using A Flash Programming Device
Programming System BIOS Using a Flash Programming Device Appendix C Programming System BIOS Using a Flash Programming Device The BIOS for the development board is in two non-removable flash devices. The flash can be programmed using a bootable DOS device, or through a special BIOS programming device that connects to header J8D2 on the board. -
Page 78: Appendix Dcpu Thermal Solution (Heatsink) Installation
CPU Thermal Solution (Heatsink) Installation Appendix D CPU Thermal Solution (Heatsink) Installation ® It is necessary for the Intel Core™ 2 Duo processor to have a thermal solution attached to it in order to keep it within its operating temperature. Caution: An ESD wrist strap must be used when handling the board and installing the heatsink/fan assembly. -
Page 79: Figure 25. Step 4 - Backplate Pins
CPU Thermal Solution (Heatsink) Installation 4. Place the backplate on the underside of the development board so that the pins protrude through the holes in the development board around the processor. (See the figure below.) Be sure to orient the backplate so that it does not contact any of the decoupling capacitors. -
Page 80: Figure 26. Step 6 - Applying The Thermal Grease
CPU Thermal Solution (Heatsink) Installation 6. Remove the tube of thermal grease from the package and use it to coat the exposed die of the CPU with the thermal grease. (See the figure below) Figure 26. Step 6 - Applying the Thermal Grease Development Kit User’s Manual... -
Page 81: Figure 27. Step 7 - Squeezing Activation Arm
CPU Thermal Solution (Heatsink) Installation 7. Pick up the heatsink and squeeze the activation arm until it comes in contact with the base plate that is attached to the heatsink base. This will cause the springs on the heatsink attachment mechanism to compress. (See the figure below) Figure 27. -
Page 82: Figure 28. Step 8 - Installing The Heatsink
CPU Thermal Solution (Heatsink) Installation 8. While keeping the activation arm compressed, place the heatsink over the pins of the heatsink backplate. Lower the heatsink until the lugs have inserted into the base of the heatsink. Slide the heatsink over the lugs on the backplate pins so that the base is directly over the processor die and the pins on the backplate have travelled the entire length of the channel in the heatsink base. -
Page 83: Figure 29. Step 9 - Plugging In The Fan
CPU Thermal Solution (Heatsink) Installation 9. Plug the fan connector for the heatsink onto the CPU fan header (J2B3) on the motherboard. (See the figure below) The CPU fan header (J2B3) is a 3-pin connector with the words CPU Fan printed beside it. Figure 29. -
Page 84: Figure 30. Step 10 - Completed Assembly
CPU Thermal Solution (Heatsink) Installation 10. Once the thermal solution is in-place, the development kit is ready to use. Figure 30. Step 10 - Completed Assembly § Development Kit User’s Manual...