Table 2-51. R_Msr_Port{7-0}_Xbr_Set{2-1}_Match Registers - Intel BX80571E7500 - Core 2 Duo 2.93 GHz Processor Programming Manual

I ® X ® P 7500 S
NTEL EON ROCESSOR
To use the match/mask facility :
a) Set the MM_CFG (see
field (bit 63) to 0 and .mm_trig_en (bit 21) to 1.
NOTE: In order to monitor packet traffic, instead of the flit traffic associated with each packet, set
.match_flt_cnt to 0x1.
b) Program the match/mask regs (see
Registers" and Table 2-52, "R_MSR_PORT{7-0}_XBR_SET{2-1}_MASK
c) Set the counter's control register event select to the appropriate IPERF subcontrol register and set
the IPERF register's event select to 0x31 (TO_R_PROG_EV) to capture the mask/match as a
performance event.
Field
dis
ig
mm_trig_en
ig_flt_cnt
match_flt_cnt
match_71_64
mask_71_64
The following table contains the packet traffic that can be monitored if one of the mask/match registers
was chosen to select the event.
Field
---
RDS
---
RNID
---
DNID
U P G
ERIES NCORE ROGRAMMING
Table 2-50, "R_MSR_PORT{7-0}_XBR_SET{2-1}_MM_CFG
Table 2-51, "R_MSR_PORT{7-0}_XBR_SET{2-1}_MATCH
Table 2-50. R_MSR_PORT{7-0}_XBR_SET{2-1}_MM_CFG
HW
Bits Reset
Val
63 0x0
62:22 0x0
21 0x0
20 0x0
19:16 0x0
15:8 0x0
7:0 0x0

Table 2-51. R_MSR_PORT{7-0}_XBR_SET{2-1}_MATCH Registers

HW
Bits Reset
Val
63:52 0x0
51:48 0x0
47:36 0x0
35:31 0x0
30:18 0x0
17:13 0x0
UIDE
Registers
Description
Disable; Set to 0 to enable use by PMUs.
Read zero; writes ignored. (?)
Match/Mask trigger enable
Set to 1 to enable mask/match trigger
Ignore flit count
Set to ignore match_flt_cnt field
Match flit count
Set number of flit count in a packet on which to trigger a match
event. Ex: Set to '0001' to match on first flit.
upper 8 bits [71:64] of match data
upper 8 bits [71:64] of mask data
(Sheet 1 of 2)
Description
Reserved; Must write to 0 else behavior is undefined.
Response Data State (valid when MC == DRS and Opcode == 0x0-
2). Bit settings are mutually exclusive.
b1000 - Modified
b0100 - Exclusive
b0010 - Shared
b0001 - Forwarding
b0000 - Invalid (Non-Coherent)
Reserved; Must write to 0 else behavior is undefined.
Remote Node ID
Reserved; Must write to 0 else behavior is undefined.
Destination Node ID
UNCORE PERFORMANCE MONITORING
Registers") .dis
Registers").
2-85