M-Box Box Level Pmon State - Intel BX80571E7500 - Core 2 Duo 2.93 GHz Processor Programming Manual

I ® X ® P 7500 S
NTEL EON ROCESSOR
MB0_CR_M_MSR_PMU_CNT_4
MB0_CR_M_MSR_PMU_CNT_CTL_4
MB0_CR_M_MSR_PMU_CNT_3
MB0_CR_M_MSR_PMU_CNT_CTL_3
MB0_CR_M_MSR_PMU_CNT_2
MB0_CR_M_MSR_PMU_CNT_CTL_2
MB0_CR_M_MSR_PMU_CNT_1
MB0_CR_M_MSR_PMU_CNT_CTL_1
MB0_CR_M_MSR_PMU_CNT_0
MB0_CR_M_MSR_PMU_CNT_CTL_0
MB0_CR_M_MSR_PMU_ZDP_CTL_FVC
MB0_CR_M_MSR_PMU_PLD
MB0_CR_M_MSR_PMU_PGT
MB0_CR_M_MSR_PMU_MSC_THR
MB0_CR_M_MSR_PMU_MAP
MB0_CR_M_MSR_PMU_ISS
MB0_CR_M_MSR_PMU_DSP
MB0_CR_M_MSR_PMU_TIMESTAMP_UNIT
MB0_CR_M_MSR_PERF_GLOBAL_OVF_CTL
MB0_CR_M_MSR_PERF_GLOBAL_STATUS
MB0_CR_M_MSR_PERF_GLOBAL_CTL
2.7.4.1

M-Box Box Level PMON state

The following registers represent the state governing all box-level PMUs in the M-Box.
The _GLOBAL_CTL register contains the bits used to enable monitoring. It is necessary to set the
.ctr_en bit to 1 before the corresponding data register can collect events.
If an overflow is detected from one of the M-Box PMON registers, the corresponding bit in the
_GLOBAL_STATUS.ov field will be set. To reset the overflow bits set in the _GLOBAL_STATUS.ov field, a
user must set the corresponding bits in the _GLOBAL_OVF_CTL.clr_ov field before beginning a new
sample interval.
U P G
ERIES NCORE ROGRAMMING UIDE
MSR Name
UNCORE PERFORMANCE MONITORING
MSR Size
Access
Address (bits)
RW_RW 0x0CB9 64
RW_RW 0x0CB8 64
RW_RW 0x0CB7 64
RW_RW 0x0CB6 64
RW_RW 0x0CB5 64
RW_RW 0x0CB4 64
RW_RW 0x0CB3 64
RW_RW 0x0CB2 64
RW_RW 0x0CB1 64
RW_RW 0x0CB0 64
RW_RW 0x0CAB 32
RW_RW 0x0CAA 32
RW_RW 0x0CA9 32
RW_RW 0x0CA8 32
RW_RW 0x0CA7 32
RW_RW 0x0CA6 32
RW_RW 0x0CA5 32
RW_RW 0x0CA4 32
RW_RW 0x0CA2 32
RW_RW 0x0CA1 32
RW_RW 0x0CA0 32
Description
M-Box 0 PMON Counter 4
M-Box 0 PMON Control 4
M-Box 0 PMON Counter 3
M-Box 0 PMON Control 3
M-Box 0 PMON Counter 2
M-Box 0 PMON Control 2
M-Box 0 PMON Counter 1
M-Box 0 PMON Control 1
M-Box 0 PMON Counter 0
M-Box 0 PMON Control 0
M-Box 0 PMON SubControl for FVC
events
M-Box 0 PMON SubControl for PLD
events
M-Box 0 PMON SubControl for PGT
events
M-Box 0 PMON SubControl for THR
events
M-Box 0 PMON SubControl for MAP
events
M-Box 0 PMON SubControl for ISS
events
M-Box 0 PMON SubControl for DSP
events
M-Box 0 PMON Timestamp
M-Box 0 PMON Global Overflow
Control
M-Box 0 PMON Global Overflow
Status
M-Box 0 PMON Global Control
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