Intel BX80571E7500 - Core 2 Duo 2.93 GHz Processor Programming Manual page 71

I ® X ® P 7500 S U P G UNCORE PERFORMANCE MONITORING
NTEL EON ROCESSOR ERIES NCORE ROGRAMMING UIDE
NO_CREDIT_HOM
• Title: HOM Credit Unavailable
• Category: System Bound Credits
• Event Code: 0x80, Max. Inc/Cyc: 1,
• Definition: Number of times the S-Box has a pending home message to send and there is no HOM or
VNA credit available.
NO_CREDIT_IPQ
• Title: IPQ Credit Unavailable
• Category: Ring Bound Credits
• Event Code: 0x8A, Max. Inc/Cyc: 1,
• Definition: Number of times the S-Box has an incoming SNP to send but there is no IPQ credit
available for the target C-Box.
NO_CREDIT_NCB
• Title: NCB Credit Unavailable
• Category: System Bound Credits
• Event Code: 0x84, Max. Inc/Cyc: 1,
• Definition: Number of times the S-Box has a pending non-coherent bypass message to send and
there is no NCB or VNA credit available.
NO_CREDIT_NCS
• Title: NCS Credit Unavailable
• Category: System Bound Credits
• Event Code: 0x83, Max. Inc/Cyc: 1,
• Definition: Number of times the S-Box has a pending non-coherent standard message to send and
there is no NCS or VNA credit available.
NO_CREDIT_NDR
• Title: NDR Credit Unavailable
• Category: System Bound Credits
• Event Code: 0x85, Max. Inc/Cyc: 1,
• Definition: Number of times the S-Box has a pending non-data response message to send and there
is no NDR or VNA credit available.
NO_CREDIT_SNP
• Title: SNP Credit Unavailable
• Category: System Bound Credits
• Event Code: 0x81, Max. Inc/Cyc: 1,
• Definition: Number of times the S-Box has a pending snoop message to send and there is no SNP or
VNA credit available.
2-59