Intel BX80571E7500 - Core 2 Duo 2.93 GHz Processor Programming Manual page 128

I ® X ® P 7500 S
NTEL EON ROCESSOR
Extension
POISON_TXN
ALERT_FRAMES
FAST_RESET
BBOX_CMDS.READS
BBOX_CMDS.WRITES
BBOX_RSP.ACK
BBOX_RSP.RETRY
BBOX_RSP.COR
BBOX_RSP.UNCOR
BBOX_RSP.SPEC_ACK
BBOX_RSP.SPR_ACK
---
BBOX_RSP.SPR_UNCOR
SMI_NB_TRIG
FVC_EV2
• Title: FVC Event 2
• Category: FVC Events
• Event Code: 0x0f, Max. Inc/Cyc: 1,
• Definition: Measure an FVC related event.
• NOTE: It is possible to program the FVC register such that up to 4 events from the FVC can be inde-
pendently monitored. However, the bcmd_match and resp_match subevents depend on the setting of
additional bits in the FVC register (11:9 and 8:5 respectively). Therefore, only ONE
FVC_EVx.bcmd_match event may be monitored at any given time. The same holds true for
FVC_EVx.resp_match
Extension
SMI_CRC_ERR
MEM_ECC_ERR
POISON_TXN
ALERT_FRAMES
FAST_RESET
BBOX_CMDS.READS
U P G
ERIES NCORE ROGRAMMING UIDE
Table 2-90. Unit Masks for FVC_EV1 (Sheet 2 of 2)
FVC FVC
[16:14] [10:8]
0x2
0x3
0x4
0x5
0x5
0x6 0x0
0x6 0x1
0x6 0x2
0x6 0x3
0x6 0x4
0x6 0x5
0x6 0x6
0x6 0x7
0x7
Table 2-91. Unit Masks for FVC_EV2
FVC FVC
[19:17] [10:8]
0x0
0x1
0x2
0x3
0x4
0x5
UNCORE PERFORMANCE MONITORING
FVC
Description
[7:5]
Count poison (directory of a write to memory was
encoded as poisoned) transactions
Counts alert frames
Fast reset request from M-Boxes
0x0 Reads commands to M box from B box (e.g. reads
from memory)
0x1 Write commands from B box to M box (e.g. writes
from memory)
Counts positive acknowledgements. No error was
detected.
Count Retry Responses. Possibly a correctable error.
Retries are generated until it is decided that the
error was either correctable or uncorrectable.
Counts corrected (for example, after error trials or
just by a retry)
Count Uncorrectable Responses.
Speculative positive acknowledgement for optimized
read flow. No error was detected for the transaction.
Count positive acknowledgements for command to
misbehaving DIMM during sparing. No error was
detected for the transaction.
(*nothing will be counted*)
Counts Uncorrectable responses to B-Box as a result
of commands issued to misbehaving DIMM during
sparing
Select Intel SMI Northbound debug event bits from
Intel SMI status frames as returned from the Intel
7500 Scalable Memory Buffers. Used for Debug
purposes
FVC
Description
[7:5]
Count link level Intel SMI CRC errors
Count memory ECC errors (that is not a link-level
CRC error)
Count poison (directory of a write to memory was
encoded as poisoned) transactions
Counts alert frames
Fast reset request from M-Boxes
0x0 Reads commands to M box from B box (e.g. reads
from memory)
2-116