Intel SL3VS - Celeron 633 MHz Processor Specification page 73

Specification update
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Figure 1 Celeron® on 0.13 Micron Processor 256K Platforms Workaround
2.5V
R1
330 ohm
R2
510 ohm
R4
0 ohm
R3
1.3K ohm
R5
The example workaround circuit assumes that the PWRGD inputs into the processors are open
collector. Tying the PWRGD inputs together in a Wired-AND fashion allows each processor to receive
PWRGD at the same time but at the latter of the 2 separate PWRGD assertions. If separation of the
PWRGD inputs to each processor is required, extra circuitry will be required.
Status: For the steppings affected, see the Summary of Changes at the beginning of this section.
®
INTEL
CELERON® PROCESSOR SPECIFICATION UPDATE
PW RGD
PGA370
TCK
39 ohm
ITP
TCK
For Production Boards:
Depopulate R5
To use ITP:
Install R5, Depopulate R4
65

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