Intel CELERON 1.10 GHZ Datasheet

Processor up to 1.10 ghz
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®
Intel
Celeron
up to 1.10 GHz
Available at 1.10 GHz, 1 GHz, 950 MHz,
900 MHz, 850 MHz, 800 MHz, 766 MHz,
733 MHz, 700 MHz, 667 MHz, 633 MHz,
600 MHz, 566 MHz, 533 MHz,
533A MHz, 500 MHz, 466 MHz,
433 MHz, 400 MHz, 366 MHz, 333 MHz,
and 300A MHz core frequencies with
128 KB level-two cache (on die); 300 MHz
and 266 MHz core frequencies without
level-two cache.
®
Intel's latest Celeron
processors in the
FC-PGA/FC-PGA2 package are
manufactured using the advanced 0.18
micron technology.
Binary compatible with applications
running on previous members of the Intel
microprocessor line.
Dynamic execution microarchitecture.
Operates on a 100/66 MHz, transaction-
oriented system bus.
Specifically designed for uni-processor
based Value PC systems, with the
capabilities of MMX™ technology.
Power Management capabilities.
®
®
The Intel
Celeron
processor is designed for uni-processor based Value PC desktops and is
binary compatible with previous generation Intel architecture processors. The Celeron processor
provides good performance for applications running on advanced operating systems such as
Microsoft* Windows*98, Windows NT*, Windows* 2000, Windows XP* and Linux*. This is
achieved by integrating the best attributes of Intel processors—the dynamic execution
performance of the P6 microarchitecture plus the capabilities of MMX™ technology—bringing
a balanced level of performance to the Value PC market segment. The Celeron processor offers
the dependability you would expect from Intel at an exceptional value. Systems based on
Celeron processors also include the latest features to simplify system management and lower the
cost of ownership for small business and home environments.
FC-PGA2 Package
FC-PGA Package
®
Processor
Optimized for 32-bit applications running
on advanced 32-bit operating systems.
Uses cost-effective packaging technology.
— Single Edge Processor (S.E.P.) Package
to maintain compatibility with SC242
(processor core frequencies (MHz):
266, 300, 300A, 333, 366, 400, 433).
— Plastic Pin Grid Array (PPGA) Package
(processor core frequencies (MHz):
300A, 333, 366, 400, 433, 466, 500,
533).
— Flip-Chip Pin Grid Array (FC-PGA /
FC-PGA2) Package (processor core
frequencies (MHz); 533A, 566, 600,
633, 667, 700, 733, 766, 800, 850, 900,
950); (GHz); 1, 1.10
Integrated high-performance 32 KB
instruction and data, nonblocking, level-
one cache: separate 16 KB instruction and
16 KB data caches.
Integrated thermal diode.
PPGA Package
Datasheet
S.E.P. Package
Document Number:
243658-020
January 2002

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Summary of Contents for Intel CELERON 1.10 GHZ

  • Page 1 Value PC market segment. The Celeron processor offers the dependability you would expect from Intel at an exceptional value. Systems based on Celeron processors also include the latest features to simplify system management and lower the cost of ownership for small business and home environments.
  • Page 2 No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
  • Page 3: Table Of Contents

    ® ® Intel Celeron Processor up to 1.10 GHz Contents Introduction........................11 Terminology......................11 1.1.1 Package Terminology................12 1.1.2 Processor Naming Convention...............13 References ......................14 Electrical Specifications....................15 System Bus and Vref...................15 Clock Control and Low Power States..............15 2.2.1 Normal State—State 1 ................16 2.2.2 AutoHALT Power Down State—State 2 ..........16 2.2.3...
  • Page 4 Processor Markings (PPGA/FC-PGA/FC-PGA2 Packages) ......108 Heatsink Volumetric Keepout Zone Guidelines..........109 Boxed Processor Specifications..................110 ® ® Mechanical Specifications for the Boxed Intel Celeron Processor ....110 6.1.1 Mechanical Specifications for the S.E.P. Package....... 110 6.1.1.1 Boxed Processor Heatsink Weight.......... 112 6.1.1.2 Boxed Processor Retention Mechanism .........
  • Page 5 Top Side Processor Markings (PPGA Package)..........108 Top Side Processor Markings (FC-PGA Package) ...........108 Top Side Processor Markings (FC-PGA2 Package) .........108 ® Retention Mechanism for the Boxed Intel® Celeron Processor in the S.E.P. Package ....................111 Side View Space Requirements for the Boxed Processor in the S.E.P.
  • Page 6 Celeron Processor up to 1.10 GHz ® ® Side View Airspace Requirements for the Boxed Intel Celeron Processor in the FC-PGA/FC-PGA2 and PPGA Packages ......116 Volumetric Keepout Requirements for The Boxed Fan Heatsink...... 116 Clip Keepout Requirements for the 370-Pin (Top View) ........117 Boxed Processor Fan Heatsink Power Cable Connector Description ....
  • Page 7 Core Pins (for Both S.E.P. and PGA Packages) ..........36 System Bus AC Specifications (SET Clock)............37 ® ® Valid Intel Celeron Processor System Bus, Core Frequency......38 System Bus AC Specifications (AGTL+ Signal Group) at the Processor Edge Fingers (for S.E.P. Package) ..............39 System Bus AC Specifications (AGTL+ Signal Group) at the Processor Core Pins (for S.E.P.
  • Page 8 ® ® Intel Celeron Processor up to 1.10 GHz AGTL+ Signal Groups Ringback Tolerance Specifications at the Processor Pins (For FC-PGA/FC-PGA2 Packages) ........... 55 AGTL+ Signal Groups Ringback Tolerance Guidelines for Edge Finger Measurement on the S.E.P. Package ..............56 Signal Ringback Specifications for Non-AGTL+ Signal Simulation at the Processor Core (S.E.P.
  • Page 9: Revision History

    ® ® Intel Celeron Processor up to 1.10 GHz Revision History Revision Date Description • Added IHS specifications for 900 MHz, 950 MHz, and 1 GHz. -020 January 2002 • Added 566 MHz specification for CPUID of 068Ah. Datasheet...
  • Page 10 ® ® Intel Celeron Processor up to 1.10 GHz This page is intentionally left blank. Datasheet...
  • Page 11: Introduction

    AutoHALT, Stop-Grant, Sleep, and Deep Sleep to conserve power during idle times. The Intel Celeron processor is capable of running today’s most common PC applications with up to 4 GB of cacheable memory space. As this processor is intended for Value PC systems, it does not ®...
  • Page 12: Package Terminology

    ® ® Intel Celeron Processor up to 1.10 GHz 1.1.1 Package Terminology The following terms are used often in this document and are explained here for clarification: • Processor substrate—The structure on which passive components (resistors and capacitors) are mounted.
  • Page 13: Processor Naming Convention

    900 MHz 900 MHz 068xh 950 MHz 950 MHz 068xh 1 GHz 1 GHz 068xh 1.10 GHz 1.10 MHz 068xh NOTES: ® ® 1. Refer to the Intel Celeron Processor Specification Update for the exact CPUID for each processor. Datasheet...
  • Page 14: References

    Intel Celeron Processor (PPGA) at 466 MHz Thermal Solutions Guidelines (Order Number 245156) Notes: 1. This reference material can be found on the Intel Developer’s Web site located at http://developer.intel.com. ® ® 2. For a complete listing of the Intel...
  • Page 15: Electrical Specifications

    Celeron processor signals use a variation of the low voltage Gunning Transceiver Logic (GTL) signaling technology. The Intel Celeron processor system bus specification is similar to the GTL specification, but has been enhanced to provide larger noise margins and reduced ringing. The improvements are accomplished by increasing the termination voltage level and controlling the edge rates.
  • Page 16: Normal State-State 1

    LINT[1:0] (NMI, INTR). RESET# will cause the processor to immediately initialize itself. The return from a System Management Interrupt (SMI) handler can be to either Normal Mode or the AutoHALT Power Down state. See the Intel Architecture Software Developer's Manual, Volume III: System Programmer's Guide (Order Number 243192) for more information.
  • Page 17: Stop-Grant State-State 3

    Stop-Grant state or in AutoHALT Power Down state. During a snoop transaction, the processor enters the HALT/Grant Snoop state. The processor will stay in this state until the snoop on the Intel Celeron processor system bus has been serviced (whether by the processor or another agent on the Intel Celeron processor system bus).
  • Page 18: Deep Sleep State-State 6

    These have been added to cleanly support voltage specification variations on current and future Celeron processors. For clean on-chip power distribution, Intel Celeron processors in the S.E.P. Package have 27 V (power) and 30 V (ground) inputs. The 27 V pins are further divided to provide the different voltage levels to the components.
  • Page 19: Phase Lock Loop (Pll) Power

    Phase Lock Loop (PLL) Power It is highly critical that phase lock loop power delivery to the processor meets Intel’s requirements. A low pass filter is required for power delivery to pins PLL1 and PLL2. This serves as an isolated, decoupled power source for the internal PLL.
  • Page 20: Voltage Identification

    The VID pins also allow for compatibility with current and future Intel Celeron processors. Note that the ‘11111’ (all opens) ID can be used to detect the absence of a processor core in a given slot (S.E.P.
  • Page 21: System Bus Unused Pins

    RESERVED pin. For Intel Celeron processors in the S.E.P. Package, the TESTHI pin must be at a logic-high level when the core power supply comes up. For more information, please refer to erratum C26 of the ®...
  • Page 22: Intel ® Celeron ® Processor System Bus Signal Groups

    V . This ensures not only correct operation for CC CMOS current Intel Celeron processors, but compatibility for future Intel Celeron processor products as well. The groups and the signals contained within each group are shown in Table 3.
  • Page 23: Asynchronous Vs. Synchronous For System Bus Signals

    The BSEL pins have two functions. First, they can act as outputs and can be used by an external clock generator to select the proper system bus frequency. Second, they can act as an inputs and ® can be used by a system BIOS to detect and report the processor core frequency. See the Intel ® ®...
  • Page 24: Processor Dc Specifications

    Section 5.0 for signal listings. Most of the signals on the Intel Celeron processor system bus are in the AGTL+ signal group. These signals are specified to be terminated to 1.5 V. The DC specifications for these signals are listed in...
  • Page 25: Voltage And Current Specifications

    ® ® Intel Celeron Processor up to 1.10 GHz Table 5. Voltage and Current Specifications (Sheet 1 of 5) Processor Symbol Parameter Unit Notes Core Freq CPUID 0650h 2.00 2, 3, 4 266 MHz 0651h 2.00 2, 3, 4 0650h 2.00...
  • Page 26 ® ® Intel Celeron Processor up to 1.10 GHz Table 5. Voltage and Current Specifications (Sheet 2 of 5) Processor Symbol Parameter Unit Notes Core Freq CPUID 0683h 1.65 2, 3, 20 800 MHz 0686h 1.70 2, 3, 20 068Ah 1.75...
  • Page 27 ® ® Intel Celeron Processor up to 1.10 GHz Table 5. Voltage and Current Specifications (Sheet 3 of 5) Processor Symbol Parameter Unit Notes Core Freq CPUID Processor core voltage transient tolerance level at: • SC242 edge — — –0.140 —...
  • Page 28 ® ® Intel Celeron Processor up to 1.10 GHz Table 5. Voltage and Current Specifications (Sheet 4 of 5) Processor Symbol Parameter Unit Notes Core Freq CPUID 266 MHz 1.12 300 MHz 1.15 300A MHz 1.15 333 MHz 1.18 366 MHz 1.21...
  • Page 29 ® ® Intel Celeron Processor up to 1.10 GHz Table 5. Voltage and Current Specifications (Sheet 5 of 5) Processor Symbol Parameter Unit Notes Core Freq CPUID 266 MHz 0.90 300 MHz 0.94 300A MHz 0.94 333 MHz 0.96 366 MHz 0.97...
  • Page 30 CC CORE_TYP CC CORE 11. The current specified is the current required for a single Intel Celeron processor. A similar amount of current is drawn through the termination resistors on the opposite end of the AGTL+ bus, unless single-ended termination is used (see Section 2.1).
  • Page 31: Agtl+ Signal Groups Dc Specifications

    4. Parameter correlated to measurement into a 25 resistor terminated to 1.5 V. 5. I for the Intel Celeron processor may experience excursions of up to 12 mA for a single system bus clock. 6. (0 2.0 V +5%) for S.E.P Package and PPGA Package; (0 1.5V +3%) for FC-PGA/FC-PGA2...
  • Page 32: Non-Agtl+ Signal Group Dc Specifications

    ® ® Intel Celeron Processor up to 1.10 GHz Table 7. Non-AGTL+ Signal Group DC Specifications Symbol Parameter Unit Notes Input Low Voltage –0.3 2.5 V +5% maximum, Input High Voltage 2.625 Note 10 Input Low Voltage –0.150 - 0.200 8, 9 IL1.5...
  • Page 33: Agtl+ System Bus Specifications

    5. It is recommended that V be held to CC VTT 1.5 V ± 3% while the Intel Celeron processor system bus is idle. This is measured at the processor edge fingers. 3. V is generated on the processor substrate to be nominally with the S.E.P.
  • Page 34: System Bus Ac Specifications

    2.12 System Bus AC Specifications The Celeron processor system bus timings specified in this section are defined at the Intel Celeron processor edge fingers and the processor core pins. Timings specified at the processor edge fingers only apply to the S.E.P. Package and timings given at the processor core pins apply to all S.E.P.
  • Page 35: System Bus Ac Specifications (Clock) At The Processor Edge Fingers (For S.e

    6. This specification applies to Intel Celeron processors when operating at a system bus frequency of 66 MHz. 7. The BCLK offset time is the absolute difference needed between the BCLK signal arriving at the Intel Celeron processor edge finger at 0.5 V vs. arriving at the core logic at 1.25 V. The positive offset is needed to account for the delay between the SC242 connector and processor core.
  • Page 36: System Bus Ac Specifications (Clock) At The Processor Core Pins (For Both S.e.p. And Pga Packages)

    All CMOS signal timings (compatibility signals, etc.) are referenced at 1.25 V at the processor core pins. 4. The internal core clock frequency is derived from the Intel Celeron processor system bus clock. The system bus clock to core clock ratio is determined during initialization.
  • Page 37 ® ® Intel Celeron Processor up to 1.10 GHz 1, 2 Table 11. System Bus AC Specifications (SET Clock) T# Parameter Unit Figure Notes 66.67 System Bus Frequency 100.00 10.0 4, 5, 10 T1: BCLK Period 10.0 4, 5, 11 ±250...
  • Page 38: Valid Intel ® Celeron ® Processor System Bus, Core Frequency

    Frequency Multiplier 10.5 11.5 1,000 1,100 NOTES: 1. Contact your local Intel representative for the latest information on processor frequencies and/or frequency multipliers. 2. While other bus ratios are defined, operation at frequencies other than those listed are not supported. Datasheet...
  • Page 39: System Bus Ac Specifications (Agtl+ Signal Group) At The Processor Edge Fingers (For S.e

    3. All AC timings for the AGTL+ signals are referenced to the BCLK rising edge at 1.25 V at the processor core pin. All AGTL+ signal timings (compatibility signals, etc.) are referenced at 1.00 V at the processor core pins. 4. This specification applies to the Intel Celeron processor operating with a 66 MHz Intel Celeron processor system bus only.
  • Page 40: Processor System Bus Ac Specifications (Agtl+ Signal Group) At The Processor Core Pins (For Ppga Package)

    ® ® Intel Celeron Processor up to 1.10 GHz Table 15. Processor System Bus AC Specifications (AGTL+ Signal Group) at the Processor Core Pins (for PPGA Package) T# Parameter Unit Figure Notes T7: AGTL+ Output Valid Delay 0.30 4.43 T8: AGTL+ Input Setup Time 2.10...
  • Page 41: System Bus Ac Specifications (Cmos Signal Group) At The Processor Edge Fingers (For S.e

    ® ® Intel Celeron Processor up to 1.10 GHz Table 17. System Bus AC Specifications (CMOS Signal Group) at the Processor Edge Fingers (for S.E.P. Package) T# Parameter Unit Figure Notes T14’: CMOS Input Pulse Width, except Active and BCLKs...
  • Page 42: System Bus Ac Specifications (Cmos Signal Group)

    BR0#, FLUSH#, INIT#) Hold Time deasserts RESET# NOTES: ® ® 1. Unless otherwise noted, all specifications in this table apply to all Intel Celeron processor frequencies. Table 21. System Bus AC Specifications (Reset Conditions) (for the FC-PGA/FC-PGA2 Packages) T# Parameter...
  • Page 43: System Bus Ac Specifications (Apic Clock And Apic I/O) At The Processor Edge Fingers (For S.e

    3. All AC timings for the APIC I/O signals are referenced to the PICCLK rising edge at 0.7 V at the processor edge fingers. All APIC I/O signal timings are referenced at 1.25 V at the processor edge fingers. 4. This specification applies to Intel Celeron processors operating with a 66 MHz Intel Celeron processor system bus only.
  • Page 44: System Bus Ac Specifications (Apic Clock And Apic I/O) At The Processor Core Pins (For S.e.p. And Pga Packages)

    3. All AC timings for the APIC I/O signals are referenced to the PICCLK rising edge at 1.25 V at the processor core pins. All APIC I/O signal timings are referenced at 1.25 V at the processor core pins. 4. This specification applies to Intel Celeron processors operating with a 66 MHz Intel Celeron processor system bus only.
  • Page 45: System Bus Ac Specifications (Tap Connection) At The Processor Edge Fingers (For S.e

    NOTES: 1. Unless otherwise noted, all specifications in this table apply to all Intel ® Celeron ® processor frequencies. 2. All AC timings for the TAP signals are referenced to the TCK rising edge at 0.70 V at the processor edge fingers.
  • Page 46: System Bus Ac Specifications (Tap Connection) At The Processor Core Pins (For Both S.e.p. And Ppga Packages)

    ® ® Intel Celeron Processor up to 1.10 GHz Table 26. System Bus AC Specifications (TAP Connection) at the Processor Core Pins (for Both S.E.P. and PPGA Packages) T# Parameter Unit Figure Notes T30: TCK Frequency 16.667 T31: TCK Period 60.0...
  • Page 47: System Bus Ac Specifications (Tap Connection)

    ® ® Intel Celeron Processor up to 1.10 GHz 1, 2, 3 Table 27. System Bus AC Specifications (TAP Connection) T# Parameter Unit Figure Notes T30: TCK Frequency 16.667 T31: TCK Period 60.0 T32: TCK High Time 25.0 + 0.200 V, 10 T33: TCK Low Time 25.0...
  • Page 48: Bclk To Core Logic Offset

    ® ® Intel Celeron Processor up to 1.10 GHz Note: For Figure 3 through Figure 10, the following apply: Figure 3 through Figure 10 are to be used in conjunction with Table 9 through Table 2. All AC timings for the AGTL+ signals at the processor edge fingers are referenced to the BCLK rising edge at 0.50 V.
  • Page 49: Bclk*, Picclk, And Tck Generic Clock Waveform

    ® ® Intel Celeron Processor up to 1.10 GHz Figure 3. BCLK*, PICCLK, and TCK Generic Clock Waveform 1.7V (2.0V*) 1.25V 0.7V (0.5V*) = T5, T25, T34 (Rise Tim e) = T6, T26, T35 (Fall Tim e) = T3, T23, T32 (High Tim e)
  • Page 50: System Bus Reset And Configuration Timings (For The S.e.p. And Ppga Packages)

    ® ® Intel Celeron Processor up to 1.10 GHz Figure 6. System Bus Reset and Configuration Timings (For the S.E.P. and PPGA Packages) BCLK RESET# Configuration (A[14:5]#, BR0#, Valid FLUSH#, INT#) = T9 (AGTL+ Input Hold Time) = T8 (AGTL+ Input Setup Time)
  • Page 51: Power-On Reset And Configuration Timings

    ® ® Intel Celeron Processor up to 1.10 GHz Figure 8. Power-On Reset and Configuration Timings BCLK CORE PWRGOOD IH, min IL, max RESET# Configuration (A20M#, IGNNE#, Valid Ratio INTR, NMI) = T15 (PWRGOOD Inactive Pulse) = T10 (RESET# Pulse Width) = T20 (Reset Configuration Signals (A20M#, IGNNE#, LINT[1:0]) Hold Time) (FC-PGA) Figure 9.
  • Page 52: System Bus Signal Simulations

    NOTES: 1. Unless otherwise noted, all specifications in this table apply to all Celeron processor frequencies. 2. This is the Intel Celeron processor system bus clock overshoot and undershoot specification for 66 MHz system bus operation. 3. The rising and falling edge ringback voltage specified is the minimum (rising) or maximum (falling) absolute...
  • Page 53: Bclk, Tck, Picclk Generic Clock Waveform At The Processor Core Pins

    ® ® Intel Celeron Processor up to 1.10 GHz Table 29. BCLK/PICCLK Signal Quality Specifications for Simulation at the Processor Pins (for the FC-PGA/FC-PGA2 Packages) T# Parameter Unit Figure Notes V1: BCLK V 0.50 V1: PICCLK V 0.70 V2: BCLK V 2.00...
  • Page 54: Bclk, Tck, Picclk Generic Clock Waveform At The Processor Edge Fingers

    1. Unless otherwise noted, all specifications in this table apply to all Celeron processor frequencies. 2. This is the Intel Celeron processor system bus clock overshoot and undershoot measurement guideline. 3. The rising and falling edge ringback voltage guideline is the minimum (rising) or maximum (falling) absolute...
  • Page 55: Agtl+ Signal Quality Specifications And Measurement Guidelines

    Figure 13 for the generic waveform. 3. All values specified by design characterization. 4. This specification applies to Intel Celeron processors operating with a 66 MHz Intel Celeron processor system bus only. 5. Ringback below V + 20 mV is not supported.
  • Page 56: Low To High Agtl+ Receiver Ringback Tolerance

    Figure 13 for the generic waveform. 3. All values specified by design characterization. 4. This guideline applies to Intel Celeron processors operating with a 66 MHz system bus only. 5. Ringback below V + 250 mV is not supported. Figure 13. Low to High AGTL+ Receiver Ringback Tolerance +0.2...
  • Page 57: Non-Agtl+ Signal Quality Specifications And Measurement Guidelines

    ® ® Intel Celeron Processor up to 1.10 GHz Non-AGTL+ Signal Quality Specifications and Measurement Guidelines There are three signal quality parameters defined for non-AGTL+ signals: overshoot/undershoot, ringback, and settling limit. All three signal quality parameters are shown in Figure 14 for the non- AGTL+ signal group.
  • Page 58: Ringback Specification

    ® ® Intel Celeron Processor up to 1.10 GHz 3.3.2 Ringback Specification Ringback refers to the amount of reflection seen after a signal has switched. The ringback specification is the voltage that the signal rings back to after achieving its maximum absolute value.
  • Page 59: Settling Limit Guideline

    FC-PGA/FC-PGA2 processor performance, care must be taken to ensure that ESD models do not clamp extreme voltage levels. Intel I/O Buffer models also contain I/O capacitance characterization. Therefore, removing the ESD diodes from an I/O Buffer model will impact results and may yield excessive overshoot/undershoot.
  • Page 60: Overshoot/Undershoot Pulse Duration (Fc-Pga/Fc-Pga2 Packages)

    ® ® Intel Celeron Processor up to 1.10 GHz After the true waveform conversion, the undershoot/overshoot specifications shown in Table 38 Table 39 can be applied to the converted undershoot waveform using the same magnitude and pulse duration specifications used with an overshoot waveform.
  • Page 61: Reading Overshoot/Undershoot Specification Tables (Fc-Pga/Fc-Pga2 Packages)

    ® ® Intel Celeron Processor up to 1.10 GHz 3.4.5 Reading Overshoot/Undershoot Specification Tables (FC-PGA/ FC-PGA2 Packages) The overshoot/undershoot specification for the FC-PGA/FC-PGA2 packages processor is not a simple single value. Instead, many factors are needed to determine the over/undershoot specification.
  • Page 62: Determining If A System Meets The Overshoot/Undershoot Specifications (Fc-Pga/Fc-Pga2 Packages)

    A guideline to ensure a system passes the overshoot and undershoot specifications is shown below. It is important to meet these guidelines; otherwise, contact your Intel field representative. 1. Insure no signal (CMOS or AGTL+) ever exceed the 1.635 V; OR 2.
  • Page 63: Maximum Acceptable Agtl+ Overshoot/Undershoot Waveform (Fc-Pga/Fc-Pga2 Packages)

    ® ® Intel Celeron Processor up to 1.10 GHz Table 39. 33 MHz CMOS Signal Group Overshoot/Undershoot Tolerance at Processor Pins (FC-PGA/FC-PGA2 Packages) Maximum Pulse Duration at Tj = 80 °C Maximum Pulse Duration at Tj = 90 °C Overshoot/...
  • Page 64: Non-Agtl+ Signal Quality Specifications And Measurement Guidelines

    ® ® Intel Celeron Processor up to 1.10 GHz Non-AGTL+ Signal Quality Specifications and Measurement Guidelines There are three signal quality parameters defined for non-AGTL+ signals: overshoot/undershoot, ringback, and settling limit. All three signal quality parameters are shown in Figure 16 for the non- AGTL+ signal group.
  • Page 65: Thermal Specifications And Design Considerations

    The maximum and minimum case temperatures are also specified in Table 40. A thermal solution should be designed to ensure the temperature of the case never exceeds these specifications. Refer to the Intel developer Web site at http://developer.intel.com for more information. Datasheet...
  • Page 66: Processor Power For The Ppga And Fc-Pga Packages

    Intel has characterized the use of the Analog Devices AD1021 diode measurement kit and found its measurement error to be ±1 7. For processors with a CPUID of 0683h, the TDP number is 11.2 W.
  • Page 67: Processor Functional Die Layout (Cpuid 0686H)

    CaseOffset ® ® temperature on the processor’s core. For more information refer to the document, Intel Pentium Processor in the FC-PGA2 Package Thermal Design Guide. 5. This processor exists in both FC-PGA and FC-PGA2 packages.
  • Page 68: Thermal Diode

    1.0173 NOTES: 1. Intel does not support or recommend operation of the thermal diode under reverse bias. 2. At room temperature with a forward bias of 630 mV. 3. n_ideality is the diode ideality factor parameter, as represented by the diode equation: I-Io(e (Vd*q)/(nkT) –...
  • Page 69: Mechanical Specifications

    ® ® Intel Celeron Processor up to 1.10 GHz Mechanical Specifications There are three package technologies which Celeron processors use. They are the S.E.P. Package, the PPGA package, and the FC-PGA/FC-PGA2 packages. The S.E.P. Package and FC-PGA/ FC-PGA2 packages contain the processor core and passive components, while the PPGA package does not have passive components.
  • Page 70: Signal Listing (S.e

    ® ® Intel Celeron Processor up to 1.10 GHz Figure 19. Processor Substrate Dimensions (S.E.P. Package) +.007 .062 -.005 2.608 27.4 mm SR 25.4 mm Copper Opening Square Slug Square 1.660 1.370 .615 .323 .814 1.196 3.804 Figure 20. Processor Substrate Primary/Secondary Side Dimensions (S.E.P. Package) .025...
  • Page 71: S.e.p. Package Signal Listing By Pin Number

    ® ® Intel Celeron Processor up to 1.10 GHz Table 45. S.E.P. Package Signal Listing Table 45. S.E.P. Package Signal Listing by Pin Number by Pin Number Pin Name Signal Buffer Type Pin Name Signal Buffer Type D60# AGTL+ I/O...
  • Page 72 ® ® Intel Celeron Processor up to 1.10 GHz Table 45. S.E.P. Package Signal Listing Table 45. S.E.P. Package Signal Listing by Pin Number by Pin Number Pin Name Signal Buffer Type Pin Name Signal Buffer Type AGTL+ I/O A107...
  • Page 73 ® ® Intel Celeron Processor up to 1.10 GHz Table 45. S.E.P. Package Signal Listing Table 45. S.E.P. Package Signal Listing by Pin Number by Pin Number Pin Name Signal Buffer Type Pin Name Signal Buffer Type Power/Other Power/Other CC CORE...
  • Page 74 ® ® Intel Celeron Processor up to 1.10 GHz Table 45. S.E.P. Package Signal Listing Table 45. S.E.P. Package Signal Listing by Pin Number by Pin Number Pin Name Signal Buffer Type Pin Name Signal Buffer Type Power/Other B112 Reserved...
  • Page 75: S.e.p. Package Signal Listing By Signal Name

    ® ® Intel Celeron Processor up to 1.10 GHz Table 46. S.E.P. Package Signal Listing Table 46. S.E.P. Package Signal Listing by Signal Name by Signal Name Pin Name Signal Buffer Type Pin Name Signal Buffer Type BPRI# A103 AGTL+ Input...
  • Page 76 ® ® Intel Celeron Processor up to 1.10 GHz Table 46. S.E.P. Package Signal Listing Table 46. S.E.P. Package Signal Listing by Signal Name by Signal Name Pin Name Signal Buffer Type Pin Name Signal Buffer Type D36# AGTL+ I/O...
  • Page 77 ® ® Intel Celeron Processor up to 1.10 GHz Table 46. S.E.P. Package Signal Listing Table 46. S.E.P. Package Signal Listing by Signal Name by Signal Name Pin Name Signal Buffer Type Pin Name Signal Buffer Type Reserved for Pentium II...
  • Page 78 ® ® Intel Celeron Processor up to 1.10 GHz Table 46. S.E.P. Package Signal Listing Table 46. S.E.P. Package Signal Listing by Signal Name by Signal Name Pin Name Signal Buffer Type Pin Name Signal Buffer Type A118 Power/Other Power/Other...
  • Page 79: Ppga Package

    ® ® Intel Celeron Processor up to 1.10 GHz PPGA Package This section defines the mechanical specifications and signal definitions for the Celeron processor in the PPGA packages. 5.2.1 PPGA Package Materials Information Figure 21 Table 47 are provided to aid in the design of a heatsink and clip.
  • Page 80: Package Dimensions (Ppga Package)

    ® ® Intel Celeron Processor up to 1.10 GHz Table 47. Package Dimensions (PPGA Package) Millimeters Inches Symbol Notes Notes 1.83 2.23 0.072 0.088 1.00 0.039 2.72 3.33 0.107 0.131 0.40 0.51 0.016 0.020 49.43 49.63 1.946 1.954 45.59 45.85 1.795...
  • Page 81: Ppga Package Signal Listing

    ® ® Intel Celeron Processor up to 1.10 GHz 5.2.2 PPGA Package Signal Listing Figure 22. PPGA Package (Pin Side View) 11 12 14 15 24 25 31 32 34 35 A12# A16# Rsvd Rsvd Rsvd BPRI# DEFER# Rsvd Rsvd...
  • Page 82 ® ® Intel Celeron Processor up to 1.10 GHz Table 49. PPGA Package Signal Listing Table 49. PPGA Package Signal Listing by Pin Number by Pin Number Pin Name Signal Buffer Type Pin Name Signal Buffer Type A31# AGTL+ I/O...
  • Page 83 ® ® Intel Celeron Processor up to 1.10 GHz Table 49. PPGA Package Signal Listing Table 49. PPGA Package Signal Listing by Pin Number by Pin Number Pin Name Signal Buffer Type Pin Name Signal Buffer Type AH32 Power/Other AK34...
  • Page 84 ® ® Intel Celeron Processor up to 1.10 GHz Table 49. PPGA Package Signal Listing Table 49. PPGA Package Signal Listing by Pin Number by Pin Number Pin Name Signal Buffer Type Pin Name Signal Buffer Type AM36 VID1 Voltage Identification...
  • Page 85 ® ® Intel Celeron Processor up to 1.10 GHz Table 49. PPGA Package Signal Listing Table 49. PPGA Package Signal Listing by Pin Number by Pin Number Pin Name Signal Buffer Type Pin Name Signal Buffer Type Power/Other BP2# AGTL+ I/O...
  • Page 86: Ppga Package Signal Listing By Pin Number

    ® ® Intel Celeron Processor up to 1.10 GHz Table 49. PPGA Package Signal Listing Table 49. PPGA Package Signal Listing by Pin Number by Pin Number Pin Name Signal Buffer Type Pin Name Signal Buffer Type Reserved Reserved for Future Use...
  • Page 87 ® ® Intel Celeron Processor up to 1.10 GHz Table 50. PPGA Package Signal Listing Table 50. PPGA Package Signal Listing in Order by Signal Name in Order by Signal Name Pin Name Signal Buffer Type Pin Name Signal Buffer Type...
  • Page 88: Ppga Package Signal Listing In Order By Signal Name

    ® ® Intel Celeron Processor up to 1.10 GHz Table 50. PPGA Package Signal Listing Table 50. PPGA Package Signal Listing in Order by Signal Name in Order by Signal Name Pin Name Signal Buffer Type Pin Name Signal Buffer Type...
  • Page 89 ® ® Intel Celeron Processor up to 1.10 GHz Table 50. PPGA Package Signal Listing Table 50. PPGA Package Signal Listing in Order by Signal Name in Order by Signal Name Pin Name Signal Buffer Type Pin Name Signal Buffer Type...
  • Page 90 ® ® Intel Celeron Processor up to 1.10 GHz Table 50. PPGA Package Signal Listing Table 50. PPGA Package Signal Listing in Order by Signal Name in Order by Signal Name Pin Name Signal Buffer Type Pin Name Signal Buffer Type...
  • Page 91 ® ® Intel Celeron Processor up to 1.10 GHz Table 50. PPGA Package Signal Listing Table 50. PPGA Package Signal Listing in Order by Signal Name in Order by Signal Name Pin Name Signal Buffer Type Pin Name Signal Buffer Type...
  • Page 92: Fc-Pga/Fc-Pga2 Packages

    ® Intel Celeron Processor up to 1.10 GHz FC-PGA/FC-PGA2 Packages This section defines the mechanical specifications and signal definitions for the Intel Celeron processor in the FC-PGA and FC-PGA2 packages. 5.3.1 FC-PGA Mechanical Specifications Figure 23 is provided to aid in the design of heatsink and clip solutions as well as demonstrate where pin-side capacitors will be located on the processor.
  • Page 93: Package Dimensions (Fc-Pga Package)

    ® ® Intel Celeron Processor up to 1.10 GHz Table 51. Package Dimensions (FC-PGA Package) Millimeters Inches Symbol Notes Notes 0.787 0.889 0.031 0.035 1.000 1.200 0.039 0.047 11.183 11.285 0.440 0.445 9.225 9.327 0.363 0.368 23.495 max 0.925 max 21.590 max...
  • Page 94: Mechanical Specifications (Fc-Pga2 Package)

    ® ® Intel Celeron Processor up to 1.10 GHz 5.3.2 Mechanical Specifications (FC-PGA2 Package) Figure 24 is provided to aid in the design of heatsink and clip solutions as well as demonstrate where pin-side capacitors will be located on the processor.
  • Page 95: Package Dimensions (Fc-Pga2 Package)

    ® ® Intel Celeron Processor up to 1.10 GHz Table 53. Package Dimensions (FC-PGA2 Package) Millimeters Inches Symbol Minimum Maximum Notes Minimum Maximum Notes 2.266 2.690 0.089 0.106 0.980 1.180 0.038 0.047 30.800 31.200 1.212 1.229 30.800 31.200 1.212 1.229 33.000 max...
  • Page 96: Recommended Mechanical Keep-Out Zones (Fc-Pga2 Package)

    ® ® Intel Celeron Processor up to 1.10 GHz 5.3.2.1 Recommended Mechanical Keep-Out Zones (FC-PGA2 Package) Figure 25. Volumetric Keep-Out Figure 26. Component Keep-Out Datasheet...
  • Page 97: Fc-Pga/Fc-Pga2 Package Signal List

    The signal locations on the PGA370 socket are to be used for signal routing, simulation, and component placement on the baseboard. Figure 27 provides a pin-side view of the Intel Celeron FC-PGA/FC-PGA2 processor pin-out. Datasheet...
  • Page 98: Fc-Pga/Fc-Pga2 Signal Listing In Order By Signal Name

    ® ® Intel Celeron Processor up to 1.10 GHz Table 55. FC-PGA/FC-PGA2 Signal Table 55. FC-PGA/FC-PGA2 Signal Listing in Order by Signal Listing in Order by Signal Name Name Pin Name Signal Group Pin Name Signal Group AGTL+ I/O BSEL0...
  • Page 99 ® ® Intel Celeron Processor up to 1.10 GHz Table 55. FC-PGA/FC-PGA2 Signal Table 55. FC-PGA/FC-PGA2 Signal Listing in Order by Signal Listing in Order by Signal Name Name Pin Name Signal Group Pin Name Signal Group D36# AGTL+ I/O...
  • Page 100 ® ® Intel Celeron Processor up to 1.10 GHz Table 55. FC-PGA/FC-PGA2 Signal Table 55. FC-PGA/FC-PGA2 Signal Listing in Order by Signal Listing in Order by Signal Name Name Pin Name Signal Group Pin Name Signal Group Power/Other LINT0/INTR CMOS Input...
  • Page 101 ® ® Intel Celeron Processor up to 1.10 GHz Table 55. FC-PGA/FC-PGA2 Signal Table 55. FC-PGA/FC-PGA2 Signal Listing in Order by Signal Listing in Order by Signal Name Name Pin Name Signal Group Pin Name Signal Group Reserved Reserved for future use...
  • Page 102 CC CORE to 0686h (not including 0686h) this pin is reserved. Power/Other CC CORE 7. This pin is reserved for Intel Celeron processors Power/Other CC CORE with a CPUID of 0686h. 8. For CPUID of 0681h, this is a V .
  • Page 103 ® ® Intel Celeron Processor up to 1.10 GHz Table 56. FC-PGA/FC-PGA2 Signal Table 56. FC-PGA/FC-PGA2 Signal Listing in Order by Pin Listing in Order by Pin Number Number Pin Name Signal Group Pin Name Signal Group D29# AGTL+ I/O...
  • Page 104 ® ® Intel Celeron Processor up to 1.10 GHz Table 56. FC-PGA/FC-PGA2 Signal Table 56. FC-PGA/FC-PGA2 Signal Listing in Order by Pin Listing in Order by Pin Number Number Pin Name Signal Group Pin Name Signal Group A21# AGTL+ I/O...
  • Page 105 ® ® Intel Celeron Processor up to 1.10 GHz Table 56. FC-PGA/FC-PGA2 Signal Table 56. FC-PGA/FC-PGA2 Signal Listing in Order by Pin Listing in Order by Pin Number Number Pin Name Signal Group Pin Name Signal Group AN11 Reserved Reserved for future use...
  • Page 106 ® ® Intel Celeron Processor up to 1.10 GHz Table 56. FC-PGA/FC-PGA2 Signal Table 56. FC-PGA/FC-PGA2 Signal Listing in Order by Pin Listing in Order by Pin Number Number Pin Name Signal Group Pin Name Signal Group Power/Other Power/Other CORE...
  • Page 107: Fc-Pga/Fc-Pga2 Signal Listing In Order By Pin Number

    ® ® Intel Celeron Processor up to 1.10 GHz Table 56. FC-PGA/FC-PGA2 Signal Table 56. FC-PGA/FC-PGA2 Signal Listing in Order by Pin Listing in Order by Pin Number Number Pin Name Signal Group Pin Name Signal Group Power/Other BCLK System Bus Clock...
  • Page 108: Processor Markings (Ppga/Fc-Pga/Fc-Pga2 Packages)

    M ALAY RB80526RX566128 FFFFFFFF-0001 SSSSS S-Spec# FPO # - S/N Figure 29. Top Side Processor Markings (FC-PGA Package) GRP1LINE1 GRP1LN1: Intel (m )(c) '01__-__(Country Of Origin) GRP1LINE2 GRP1LN2: (Core Freq)/(Cache)/(Bus Freq)/(Voltage) GRP2LINE1 GRP2LN1: (FPO)-(S/N) GRP2LINE2 GRP2LN2: Celeron (S-Spec) 2D M atrix M ark Figure 30.
  • Page 109: Heatsink Volumetric Keepout Zone Guidelines

    Due to the large number of proprietary heatsink designs, Intel cannot specify a keepout zone that covers all passive and active-fan heatsinks. It is the system designer’s responsibility to consider their own proprietary solution when designing the ®...
  • Page 110: Boxed Processor Specifications

    Unless otherwise noted, all figures in this section are dimensioned in inches. Note: Drawings in this section reflect only the specifications of the Intel boxed processor product. These dimensions should not be used as a generic keepout zone for all heatsinks. It is the system designer’s responsibility to consider their proprietary solution when designing to the required...
  • Page 111: Side View Space Requirements For The Boxed Processor In The S.e

    ® ® Intel Celeron Processor up to 1.10 GHz ® ® Figure 31. Retention Mechanism for the Boxed Intel Celeron Processor in the S.E.P. Package Side View Space Requirements for the Boxed Processor in the S.E.P. Figure 32. Package 1.386 S.E.P.P.
  • Page 112: Boxed Processor Heatsink Weight

    Airflow Keepout Zones from end of Fan Heatsink Airflow Keepout Zones from face of Fan Heatsink 6.1.1.1 Boxed Processor Heatsink Weight The heatsink for the boxed Intel Celeron processor in the S.E.P. Package will not weigh more than 225 grams. 6.1.1.2 Boxed Processor Retention Mechanism The boxed Intel Celeron processor requires a S.E.P.
  • Page 113: Mechanical Specifications For The Ppga Package

    Figure 34 shows a mechanical representation of the boxed Intel Celeron processor in the PPGA package. Note that the airflow of the fan heatsink is into the center and out of the sides of the fan heatsink. Clearance is required around the fan heatsink to ensure unimpeded airflow for proper cooling. The...
  • Page 114: Boxed Processor Heatsink Weight

    Celeron Processor up to 1.10 GHz 6.1.2.1 Boxed Processor Heatsink Weight The heatsink for the boxed Intel Celeron processor in the PPGA package will not weigh more than 180 grams. 6.1.3 Mechanical Specifications for the FC-PGA/FC-PGA2 Packages This section documents the mechanical specifications of the fan heatsink for the boxed Intel Celeron processor in the FC-PGA/FC-PGA2 (Flip-Chip Pin Grid Array) packages.
  • Page 115: Boxed Processor Heatsink Weight

    Processor up to 1.10 GHz 6.1.3.1 Boxed Processor Heatsink Weight The heatsink for the boxed Intel Celeron processor in the FC-PGA/FC-PGA2 packages will not weigh more than 180 grams. Thermal Specifications This section describes the cooling requirements of the fan heatsink solution utilized by the boxed processors.
  • Page 116: Side View Airspace Requirements For The Boxed Intel

    ® ® Intel Celeron Processor up to 1.10 GHz ® ® Figure 39. Side View Airspace Requirements for the Boxed Intel Celeron Processor in the FC-PGA/FC-PGA2 and PPGA Packages Measure ambient temperature 0.3" above center of fan inlet 0.20 Min Air Space 0.20 Min...
  • Page 117: Boxed Processor Thermal Cooling Solution Clip

    Figure 41 for specifications). Figure 41. Clip Keepout Requirements for the 370-Pin (Top View) ® ® Electrical Requirements for the Boxed Intel Celeron Processor 6.3.1 Electrical Requirements The boxed processor's fan heatsink requires a +12 V power supply. A fan power cable is shipped with the boxed processor to draw power from a power header on the motherboard.
  • Page 118: Boxed Processor Fan Heatsink Power Cable Connector Description

    Celeron Processor up to 1.10 GHz The boxed Intel Celeron processors in the PPGA package at 500 MHz and below are shipped with an unattached fan heatsink with two wire power-supply cables. These two wire fans do NOT support the motherboard-mounted fan speed monitor feature. The Intel Celeron processor at 533 MHz and above ship with unattached fan heatsinks that have three power-supply cables.
  • Page 119: Motherboard Power Header Placement For The S.e

    ® ® Intel Celeron Processor up to 1.10 GHz Figure 43. Motherboard Power Header Placement for the S.E.P. Package 242-Contact Slot Connector Fan power connector location 1.428" (1.56 inches above motherboard 1.449" r = 4.75" Motherboard fan power header should be positioned within 4.75 inches of the fan...
  • Page 120: Processor Signal Description

    ADS# snoop, or deferred reply ID match operations associated with the new transaction. This signal must connect the appropriate pins on all Intel Celeron processor system bus agents. The BCLK (Bus Clock) signal determines the bus frequency. All Intel Celeron...
  • Page 121 The DBSY# (Data Bus Busy) signal is asserted by the agent responsible for driving data on the Intel Celeron processor system bus to indicate that the data bus is in DBSY# use. The data bus is released after DBSY# is deasserted. This signal must connect the appropriate pins on all Intel Celeron processor system bus agents.
  • Page 122 EMI pins should be connected to motherboard ground and/or to chassis ground through zero ohm (0 ) resistors. The zero ohm resistors should be placed in close proximity to the Intel Celeron processor connector. The path to chassis ground (S.E.P.P. only) should be short in length and have a low impedance.
  • Page 123 The PICD[1:0] (APIC Data) signals are used for bidirectional serial message passing PICD[1:0] on the APIC bus, and must connect the appropriate pins of the Intel Celeron processor for proper initialization. All Intel Celeron processors have internal analog PLL clock generators that require PLL1, PLL2 quiet power supplies.
  • Page 124 ® ® Intel Celeron Processor up to 1.10 GHz Table 59. Alphabetical Signal Reference (Sheet 5 of 7) Signal Type Description The REQ[4:0]# (Request Command) signals must connect the appropriate pins of REQ[4:0]# all processor system bus agents. They are asserted by the current bus owner over two clock cycles to define the currently active transaction type.
  • Page 125 The assertion of STPCLK# has no effect on the bus clock; STPCLK# is an asynchronous input. The TCK (Test Clock) signal provides the clock input for the Intel Celeron processor Test Access Port. The TDI (Test Data In) signal transfers serial test data into the processor. TDI provides the serial input needed for JTAG specification support.
  • Page 126: Signal Summaries

    The combination of opens and shorts defines the voltage required by the processor. The VID pins are needed to cleanly support VID[3:0] voltage specification variations on Intel Celeron processors. See Table 2 (PGA packages definitions of these pins. The power supply must supply the voltage that is requested only) by these pins, or disable itself.
  • Page 127: Input Signals

    ® ® Intel Celeron Processor up to 1.10 GHz Table 61. Input Signals Name Active Level Clock Signal Group Qualified A20M# Asynch CMOS Input Always BPRI# BCLK AGTL+ Input Always BCLK High — System Bus Clock Always DEFER# BCLK AGTL+ Input...
  • Page 128: Input/Output Signals (Single Driver)

    ® ® Intel Celeron Processor up to 1.10 GHz Table 62. Input/Output Signals (Single Driver) Name Active Level Clock Signal Group Qualified BSEL[1:0] Asynch Power/Other Always BP[3:2] BCLK AGTL+ I/O Always BR0# BCLK AGTL+I/O Always A[31:3]# BCLK AGTL+ I/O ADS#, ADS#+1...

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