Page 1 Cat. No. W340-E1-16 SYSMAC CS Series SYSMAC CJ Series SYSMAC One NSJ Series Programmable Controllers REFERENCE MANUAL...
Page 3 SYSMAC CS Series CS1G/H-CPU@@-EV1 CS1G/H-CPU@@H CS1D-CPU@@H CS1D-CPU@@S SYSMAC CJ Series CJ1H-CPU@@H-R CJ1G-CPU@@ CJ1G/H-CPU@@H CJ1G-CPU@@P CJ1M-CPU@@ SYSMAC One NSJ Series Programmable Controllers Instructions Reference Manual Revised August 2008...
Page 5 1. Indicates lists of one sort or another, such as procedures, checklists, etc. OMRON, 1999 All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form, or by any means, mechanical, electronic, photocopying, recording, or otherwise, without the prior written permission of OMRON.
Page 6 This applies to the CS1-H, CJ1-H, CJ1M, and CS1D CPU Units. Notation of Unit Versions The unit version is given to the right of the lot number on the nameplate of the on Products products for which unit versions are being managed, as shown below.
Page 7 Unit version Use the above display to confirm the unit version of the CPU Unit. Unit Manufacturing Information In the IO Table Window, right-click and select Unit Manufacturing informa- tion - CPU Unit. The following Unit Manufacturing information Dialog Box will be displayed.
Page 8 Unit version Use the above display to confirm the unit version of the CPU Unit connected online. Using the Unit Version The following unit version labels are provided with the CPU Unit. Labels These labels can be attached to the front of previous CPU Units to differenti- ate between CPU Units of different unit versions.
Page 9 Unit Version Notation In this manual, the unit version of a CPU Unit is given as shown in the follow- ing table. Product nameplate CPU Units on which no unit version is Units on which a version is given (Ver. @.@) given Lot No.
Page 10 Pre-Ver. 1.1 Single-CPU Systems Unit version 2.0 CS1D-CPU@@S CS1 CPU Units CS1@-CPU@@ No unit version. CS1@-CPU@@-V1 No unit version. CS1 Version-1 CPU Units CJ Series Units Models Unit version CJ1-H CPU Units CJ1H-CPU@@H-R Unit version 4.0 CJ1@-CPU@@H Unit version 4.0 CJ1@-CPU@@P Unit version 3.0...
Page 11 4.0 or later cannot be used on CS/CJ-series CPU Units with unit ver- sion 3.0 or earlier. An error message will be displayed if an attempt is made to download programs containing unit version 4.0 functions to a CPU Unit with a unit version of 3.0 or earlier, and the download will not be possible.
Page 12 Functions Supported for Unit Version 3.0 or Later CX-Programmer 5.0 or higher must be used to enable using the functions added for unit version 3.0. CS1-H CPU Units Function CS1@-CPU@@H Unit version 3.0 or Other unit versions later Function blocks...
Page 13 3.0 or later cannot be used on CS/CJ-series CPU Units with unit ver- sion 2.0 or earlier. An error message will be displayed if an attempt is made to download programs containing unit version 3.0 functions to a CPU Unit with a unit version of 2.0 or earlier, and the download will not be possible.
Page 14 Functions Supported for Unit Version 2.0 or Later CX-Programmer 4.0 or higher must be used to enable using the functions added for unit version 2.0. CS1-H CPU Units Function CS1-H CPU Units (CS1@-CPU@@H) Unit version 2.0 or Other unit versions...
Page 15 Network Levels Connecting Online to PLCs via NS-series Setting First Slot Words OK for up to 64 groups Automatic Transfers at Power ON without a Parameter File Automatic Detection of I/O Allocation Method for Automatic Transfer at Power ON Operation Start/End Times...
Page 16 2.0 or later cannot be used on CS/CJ-series Pre-Ver. 2.0 CPU Units. An error message will be displayed if an attempt is made to download pro- grams containing unit version s.0 functions to a Pre-Ver. 2.0 CPU Unit, and...
Page 17 If an object program file (.OBJ) using these functions is transferred to a Pre- Ver. 2.0 CPU Unit, a program error will occur when operation is started or when the unit version 2.0 function is executed, and CPU Unit operation will stop.
Page 18 2. CX-Programmer version 7.1 or higher is required to use the new functions added for unit version 4.0 of the CJ1-H-R CPU Units. CX-Programmer ver- sion 7.22 or higher is required to use unit version 4.1 of the CJ1-H-R CPU Units. CX-Programmer version 7.0 or higher is required to use unit version 4.2 of the CJ1-H-R CPU Units.
Page 19 Device Type Setting The unit version does not affect the setting made for the device type on the CX-Programmer. Select the device type as shown in the following table regardless of the unit version of the CPU Unit. Series CPU Unit group...
Page 20 CPU Unit to a previous unit version. After the above message is displayed, a compiling error will be displayed on the Compile Tab Page in the Output Window. An attempt was to download a Check the settings in the PLC...
Page 21: Table Of Contents
Alphabetical List of Instructions by Mnemonic ........
Page 22 3-21 High-speed Counter/Pulse Output Instructions ........
Page 23 128 KB 64K KB Please read this manual and all related manuals listed in the table on the next page and be sure you understand information provided before attempting to program or use CS/CJ-series CPU Units in a PLC System.
Page 24 Section 1 introduces the CS/CJ-series PLCs in terms of the instruction set that they support. Section 2 provides various lists of instructions that can be used for reference. Section 3 individually describes the instructions in the CS/CJ-series instruction set. Section 4 provides instruction execution times and the number of steps for each CS/CJ-series instruc- tion.
Page 25 Provides an outline of and describes the design, CS1D-CPU@@H CPU Units installation, maintenance, and other basic opera- CS1D-CPU@@S CPU Units tions for a Duplex System based on CS1D CPU CS1D-DPL1 Duplex Unit Units. CS1D-PA207R Power Supply Unit Duplex System Operation Manual...
Page 26 CX-One Setup Manual !WARNING Failure to read and understand the information provided in this manual may result in per- sonal injury or death, damage to the product, or product failure. Please read each section in its entirety and be sure you understand the information provided in the section and related sections before attempting any of the procedures or operations given.
Page 27 WHETHER SUCH CLAIM IS BASED ON CONTRACT, WARRANTY, NEGLIGENCE, OR STRICT LIABILITY. In no event shall the responsibility of OMRON for any act exceed the individual price of the product on which liability is asserted. IN NO EVENT SHALL OMRON BE RESPONSIBLE FOR WARRANTY, REPAIR, OR OTHER CLAIMS...
Page 28 The following are some examples of applications for which particular attention must be given. This is not intended to be an exhaustive list of all possible uses of the products, nor is it intended to imply that the uses listed may be suitable for the products: •...
Page 29 PERFORMANCE DATA Performance data given in this manual is provided as a guide for the user in determining suitability and does not constitute a warranty. It may represent the result of OMRON's test conditions, and the users must correlate it to actual application requirements.
Page 31 Conformance to EC Directives ........
Page 32: Intended Audience
!WARNING It is extremely important that a PLC and all PLC Units be used for the speci- fied purpose and under the specified conditions, especially in applications that can directly or indirectly affect human life. You must consult with your OMRON representative before applying a PLC System to the above-mentioned appli- cations.
Page 33 !Caution Confirm safety before transferring data files stored in the file memory (Mem- ory Card or EM file memory) to the I/O area (CIO) of the CPU Unit using a peripheral tool. Otherwise, the devices connected to the output unit may mal- function regardless of the operation mode of the CPU Unit.
Page 34: Operating Environment Precautions
PLC to which is mounted a non-insulated Unit (CS1W-CLK12/52(-V1) or CS1W-ETN01) connected to an external power supply. A short-circuit will be created if the 24 V side of the external power supply is grounded and the 0 V side of the peripheral device is grounded. When connecting a peripheral device to this type of PLC, either ground the 0 V side of the external power supply or do not ground the external power supply at all.
Page 35 Programming Device or using the DATE(735) instruction. The clock will not start until the time has been set. • When the CPU Unit is shipped from the factory, the PLC Setup is set so that the CPU Unit will start in the operating mode set on the Programming Console mode switch.
Page 36 BUSY indicator to go out before removing the Memory Card. • If the I/O Hold Bit is turned ON, the outputs from the PLC will not be turned OFF and will maintain their previous status when the PLC is switched from RUN or MONITOR mode to PROGRAM mode.
Page 37 • Do not pull on the cables or bend the cables beyond their natural limit. Doing either of these may break the cables. • Do not place objects on top of the cables or other wiring lines. Doing so may break the cables.
Page 38: Conformance To Ec Directives
Conformance to EC Directives • When replacing parts, be sure to confirm that the rating of a new part is correct. Not doing so may result in malfunction or burning. • Before touching a Unit, be sure to first touch a grounded metallic object in order to discharge any static build-up.
Page 39: Conformance To Ec Directives
EN61000-6-4 (Radiated emission: 10-m regulations) Low Voltage Directive Always ensure that devices operating at voltages of 50 to 1,000 V AC and 75 to 1,500 V DC meet the required safety standards for the PLC (EN61131-2). Conformance to EC Directives The CS/CJ-series PLCs comply with EC Directives.
Page 40 If the supply voltage is 100 to 200 V, insert the varistor between the contacts. When switching a load with a high inrush current such as an incandescent lamp, suppress the inrush current as shown below. Countermeasure 1 Countermeasure 2...
Page 41: Introduction
Instruction Execution Checks ........
Page 42: General Instruction Characteristics
1-1-1 Program Capacity The program capacity tells the size of the user program area in the CPU Unit and is expressed as the number of program steps. The number of steps required in the user program area for each of the CS/CJ-series instructions varies from 1 to 7 steps, depending upon the instruction and the operands used with it.
Page 43 PLC is converted for a CS/CJ- series PLC based on the assumption that 1 word is 1 step. Refer to the infor- mation at the end of SECTION 4 Instruction Execution Times and Number of Steps for guidelines on converting program capacities from previous OMRON PLCs.
Page 44 DIFD(014) or DOWN(522). 1-1-3 Instruction Variations The variation prefixes (@, %, and !) can be added to an instruction to create a differentiated instruction or provide immediate refreshing. Variation Prefix...
Page 45 Refer to the description of the block program- ming instructions for details. Note If an execution condition does not precede an instruction that requires one, a program error will occur when the program is checked from a Peripheral Device.
Page 46 Section 1-1 General Instruction Characteristics Note An instruction’s operands may also be referred to by their position in the instruction (first operand, second operand, ...). The codes used for the oper- and vary with the specific function of the operand.
Page 47 32770 Specifies E2_00002. Note When binary mode is selected in the PLC Setup, the DM Area and current EM bank addresses (bank 0 to C) are treated as consecutive memory addresses. A word in EM bank 0 will be specified if an indirectly addressed DM word con- tains a value greater than 32,767.
Page 48 #0001 to the remented when the instruc- word at that I/O memory address. tion is executed even if an error occurs and the Error Flag turns ON. Note Make sure that the contents of index registers indicate valid I/O memory addresses.
Page 49 D00000 and D00001 Specifying Text Strings Method Description Code Examples Instruction example MOV$ D00100 D00200 Text strings Text is stored in ASCII (1 byte/ "ABCDE" character excluding special D00100 "A" "B" characters) starting with the D00101 "C" "D"...
Page 50 OFF. Therefore, when indirect memory addresses are specified using auto- incrementing or auto-decrementing (,IR+ or ,IR-) in an operand of any of these instructions, the value in the Index Register (IR) is refreshed each cycle regardless of the input condition (increases or decreases one every cycle).
Page 51 OUT, IR0+ Operation: When the PLC memory address 000013 is stored in IR0. The input condition is OFF (P_Off is the Always OFF Flag), so the OUT instruction sets 000013, which is indirectly addressed by IR0, to OFF. The OUT instruction is executed, so IR0 is incremented. As a result, the PLC memory address 000014, which was incremented by +1 in the IR0, is stored.
Page 52 It can be used to set or monitor from the I/O memory Edit and Monitor Screen on the CX- Programmer (not supported by the Programming Consoles). As such, users do not need to know this format although they do need to know that the formatting takes up two words.
Page 53: Instruction Execution Checks
When a program error has occurred, the task number of the task that was being executed when program execution was stopped is written to A294 and the program address is written to A298 and A299. Use the contents of these words to locate the program error and correct it as necessary. Address...
Page 54 Instruction Execution Checks Section 1-2 All errors for which the Error Flag or Access Error Flag turns ON is treated as a program error The following table lists program errors. The PLC Setup can be set to stop program execution when one of these errors occurs.
Page 55: Summary Of Instructions
2-2-25 Display Instructions ........
Page 56: Instruction Classifications By Function
Instruction Classifications by Function The following table lists the CS/CJ-series instructions by function. (The instructions appear by order of their function in Section 3 Instructions.) *Instructions or instruction groups marked with a single asterisk are supported by CS1-H, CJ1-H, CJ1M, and CS1D CPU Units only.
Page 57 LD, AND, OR Symbol com- LD, AND, OR Symbol instructions comparison parison parison (dou- comparison =, <>, <, <=, >, (unsigned) =, <>, <, <=, >, ble-word, =, <>, <, <=, >, (signed) >= >= + L unsigned) >= +S...
Page 58 Section 2-1 Instruction Classifications by Function Classifica- Sub-class Mnemonic Instruction Mnemonic Instruction Mnemonic Instruction tion Data shift 1-bit shift SHIFT REG- SFTR REVERSIBLE ASLL DOUBLE instructions ISTER SHIFT REG- SHIFT LEFT ISTER ARITHMETIC ARITHMETIC ASRL DOUBLE SHIFT LEFT SHIFT RIGHT...
Page 59 Section 2-1 Instruction Classifications by Function Classifica- Sub-class Mnemonic Instruction Mnemonic Instruction Mnemonic Instruction tion Symbol Binary add SIGNED DOUBLE SIGNED math BINARY ADD SIGNED BINARY ADD instructions WITHOUT BINARY ADD WITH CARRY CARRY WITHOUT CARRY DOUBLE SIGNED BINARY ADD...
Page 60 Section 2-1 Instruction Classifications by Function Classifica- Sub-class Mnemonic Instruction Mnemonic Instruction Mnemonic Instruction tion Conversion BCD-binary con- BCD TO BINL DOUBLE BCD BINARY TO instructions versions BINARY TO DOUBLE BINARY BCDL DOUBLE 2’S COMPLE- NEGL DOUBLE 2’S BINARY TO...
Page 61 FVAL* ASCII TO Symbol compari- LD, AND, OR Symbol com- son and conver- parison (sin- POINT TO FLOATING- sion* =, <>, <, <=, >, gle-precision ASCII POINT >= + F floating point) Single-precision MOVF MOVE FLOAT- floating point move ING-POINT (See note 2.)
Page 62 Instruction Classifications by Function Section 2-1 Classifica- Sub-class Mnemonic Instruction Mnemonic Instruction Mnemonic Instruction tion Table data Stack SSET SET STACK PUSH PUSH ONTO LIFO LAST IN processing processing STACK FIRST OUT instructions FIFO FIRST IN SNUM* STACK SIZE SREAD*...
Page 63 Section 2-1 Instruction Classifications by Function Classifica- Sub-class Mnemonic Instruction Mnemonic Instruction Mnemonic Instruction tion Serial com- PMCR PROTOCOL TRANSMIT RECEIVE munica- MACRO tions STUP CHANGE instructions SERIAL PORT SETUP Network SEND NETWORK RECV NETWORK CMND DELIVER instructions SEND RECEIVE...
Page 64 Instruction Classifications by Function Section 2-1 Classifica- Sub-class Mnemonic Instruction Mnemonic Instruction Mnemonic Instruction tion Block Define block pro- BPRG BLOCK PRO- BEND BLOCK PRO- program- gram area GRAM BEGIN GRAM END ming Block BPPS BLOCK BPRS BLOCK instructions program start/stop...
Page 65: Instruction Functions
@LD NOT %LD NOT !LD NOT Starting !@LD NOT point of !%LD NOT block Takes a logical AND of the status of the specified operand bit and the Continues on current execution condition. rung @AND Required %AND !AND !@AND...
Page 66 TST(350) gram like LD, AND, and OR; the execution condition is ON when the rung LD TST specified bit in the specified word is ON and OFF when the bit is OFF. Not required S: Source word N: Bit number...
Page 67: Sequence Output Instructions
TST(350) gram like LD, AND, and OR; the execution condition is ON when the rung OR TST specified bit in the specified word is ON and OFF when the bit is OFF. Required S: Source word N: Bit number BIT TEST...
Page 68 SETB(532) turns ON the specified bit in the specified word when the exe- Output (CS1-H, CJ1-H, SETB(532) cution condition is ON. Required CJ1M, or CS1D Unlike the SET instruction, SETB(532) can be used to set a bit in a DM or only) EM word. SETB @SETB D: Word address !SETB...
Page 69 RSTB(533) turns OFF the specified bit in the specified word when the Output RESET (CS1-H, RSTB(533) execution condition is ON. Required CJ1-H, CJ1M, or Unlike the RSET instruction, RSTB(533) can be used to reset a bit in a CS1D only) DM or EM word. RSTB @RSTB !RSTB D: Word address...
Page 70: Sequence Control Instructions
Indicates the end of a program. END(001) Not required END(001) completes the execution of a program for that cycle. No instructions written after END(001) will be executed. Execution proceeds to the program with the next task number. When the program being executed has the highest task number in the program, END(001) marks the end of the overall main program.
Page 71 D: Interlock Status Bit @ or% prefix) between MILH(517) and the corresponding MILC(519), Unit Ver. 2.0 or later that instruction will be executed after the interlock is cleared if the dif- only ferentiation condition of the instruction was established while it was interlocked.
Page 72 JUMP Not required When the execution condition for CJP(004) is OFF, program execution CJPN jumps directly to the first JME(005) in the program with the same jump number. CJPN(511) and JME(005) are used in pairs. N: Jump number Execution Execution...
Page 73 Repeated N times loops Repeated program section BREAK LOOP Output Programmed in a FOR-NEXT loop to cancel the execution of the loop BREAK(514) for a given execution condition. The remaining instructions in the loop BREAK Required are processed as NOP(000) instructions.
Page 74: Timer And Counter Instructions
TEN-MS TIMER TIMH(015)/TIMHX(551) operates a decrementing timer with units of Output TIMH(015) 10-ms. The setting range for the set value (SV) is 0 to 99.99 s for BCD TIMH Required and 0 to 655.35 s for binary (decimal or hexadecimal).
Page 75 TIMU(541)/TIMUX(556) operates an decrementing timer with units of Output TIMU(541) TIMER (CJ1-H-R 0.1-s. The setting range for the set value (SV) is 0 to 0.999 s for BCD Required only) and 0 to 6,553.5 s for binary (decimal or hexadecimal).
Page 76 TTIM(087)/TTIMX(555) operates an incrementing timer with units of TTIM(087) input TIMER Required 0.1-s. The setting range for the set value (SV) is 0 to 999.9 s for TTIM BCD and 0 to 6,553.5 s for binary (decimal or hexadecimal). (BCD) Timer input...
Page 77 MTIM(543) TIMER Required independent SVs and Completion Flags. The setting range for the MTIM set value (SV) is 0 to 999.9 s for BCD and 0 to 6,553.5 s for binary (decimal or hexadecimal). (BCD) Timer PV MTIMX D1: Completion...
Page 78 Completion Flag RESET TIMER/ CNR(545)/CNRX(547) resets the timers or counters within the speci- Output CNR(545) COUNTER fied range of timer or counter numbers. Sets the set value (SV) to the Required maximum of 9999. @CNR (BCD) : 1st number in...
Page 79: Comparison Instructions
32-bit binary data and create an ON execution condition when AND, OR: : Comparison the comparison condition is true. There are three types of symbol com- Required LD, AND, OR + =, data 2 parison instructions, LD (LOAD), AND, and OR.
Page 80 AND, and OR. Time values (year, month, day, hour, minute, and second) DT, <> DT, < DT, Required can be masked/unmasked in the comparison so it is easy to create cal- <= DT, > DT, >= endar timer functions. 341 (= DT) 342 (<>...
Page 81 Output Compares the source data to 16 ranges (defined by 16 lower limits BCMP(068) BLOCK COM- and 16 upper limits) and turns ON the corresponding bit in the result Required PARE word when the source data is within the range.
Page 82 AREA RANGE Compares the 16-bit unsigned binary value in CD (word contents or Output ZCP(088) COMPARE constant) to the range defined by LL and UL and outputs the results to Required the Arithmetic Flags in the Auxiliary Area. @ZCP (CS1-H, CJ1-H,...
Page 83: Data Movement Instructions
@MOVL Bit status not S: 1st source changed. word D: 1st destination word MOVE NOT Output Transfers the complement of a word of data to the specified word. MVN(022) Required Source word @MVN S: Source D: Destination Bit status inverted.
Page 84 Symbol/Operand Function Location Page Mnemonic Execution condition Code MOVE DIGIT Output Transfers the specified digit or digits. (Each digit is made up of 4 bits.) MOVD(083) MOVD Required @MOVD S: Source word or data C: Control word D: Destination word...
Page 85 @DIST S: Source word Bs: Destination base address Of: Offset Bs+n DATA COLLECT Output Transfers the source word (calculated by adding an offset value to the COLL(081) COLL base address) to the destination word. Required @COLL Bs: Source base Bs+n...
Page 86: Data Shift Instructions
Status of data Lost input for each shift St: Starting word input E: End word REVERSIBLE Output Creates a shift register that shifts data to either the right or the left. SHIFT REGISTER SFTR(084) Required SFTR @SFTR Data input Shift...
Page 87 Shifts all Wd bits one bit to the left including the Carry Flag (CY). ROL(027) Required @ROL Wd: Word DOUBLE Output Shifts all Wd and Wd + 1 bits one bit to the left including the Carry Flag ROTATE LEFT ROLL(572) Required (CY). ROLL Wd+1...
Page 88 @RRNC Wd: Word DOUBLE Output Shifts all Wd and Wd +1 bits one bit to the right not including the Carry ROTATE RIGHT RRNL(577) Required Flag (CY). The contents of the rightmost bit of Wd +1 is shifted to the WITHOUT leftmost bit of Wd, and to the Carry Flag (CY).
Page 89 Function Location Page Mnemonic Execution condition Code SHIFT N-BITS Output Shifts the specified 16 bits of word data to the left by the specified NASL(580) LEFT Required number of bits. NASL @NASL D: Shift word Shift n-bits C: Control word Contents of shifted in "a"...
Page 90: Increment/Decrement Instructions
Function Location Page Mnemonic Execution condition Code INCREMENT Output Increments the 4-digit hexadecimal content of the specified word by 1. BINARY ++(590) Required Wd: Word DOUBLE INCRE- Output Increments the 8-digit hexadecimal content of the specified words by ++L(591) MENT BINARY...
Page 91: Symbol Math Instructions
Ad: 1st addend word R: 1st result word SIGNED BINARY Output Adds 4-digit (single-word) hexadecimal data and/or constants with the +C(402) ADD WITH Carry Flag (CY). Required CARRY (Signed binary) (Signed binary) Au: Augend word...
Page 92 Ad: 1st addend word R: 1st result word BCD ADD WITH Output Adds 4-digit (single-word) BCD data and/or constants with the Carry +BC(406) CARRY Required Flag (CY). (BCD) @+BC (BCD) Au: Augend word CY will turn ON...
Page 93 Mi: 1st minuend (BCD) when there is a word borrow. Su: 1st subtrahend word R: 1st result word BCD SUBTRACT Output Subtracts 4-digit (single-word) BCD data and/or constants with the BC(416) WITH CARRY Required Carry Flag (CY). –BC (BCD) @–BC (BCD) −...
Page 94 Section 2-2 Instruction Functions Instruction Symbol/Operand Function Location Page Mnemonic Execution condition Code DOUBLE BCD Output Subtracts 8-digit (double-word) BCD data and/or constants with the BCL(417) SUBTRACT Required Carry Flag (CY). WITH CARRY (BCD) Mi +1 –BCL @–BCL (BCD) Su+1 −...
Page 95 Section 2-2 Instruction Functions Instruction Symbol/Operand Function Location Page Mnemonic Execution condition Code BCD MULTIPLY Output Multiplies 4-digit (single-word) BCD data and/or constants. *B(424) Required (BCD) × (BCD) Md: Multiplicand (BCD) R +1 word Mr: Multiplier word R: Result word...
Page 96: Conversion Instructions
Converts BCD data to binary data. BIN(023) Required @BIN (BCD) (BIN) S: Source word R: Result word DOUBLE BCD TO Output Converts 8-digit BCD data to 8-digit hexadecimal (32-bit binary) data. BINL(058) DOUBLE Required BINARY (BCD) (BIN) BINL @BINL (BCD)
Page 97 Symbol/Operand Function Location Page Mnemonic Execution condition Code BINARY TO BCD Output Converts a word of binary data to a word of BCD data. BCD(024) Required @BCD (BIN) (BCD) S: Source word R: Result word DOUBLE Output Converts 8-digit hexadecimal (32-bit binary) data to 8-digit BCD data.
Page 98 Mnemonic Execution condition Code DATA DECODER Output Reads the numerical value in the specified digit (or byte) in the source MLPX(076) MLPX Required word, turns ON the corresponding bit in the result word (or 16-word @MLPX range), and turns OFF all other bits in the result word (or 16-word range).
Page 99 Execution condition Code DATA ENCODER Output FInds the location of the first or last ON bit within the source word (or DMPX(077) 16-word range), and writes that value to the specified digit (or byte) in DMPX Required the result word.
Page 100 16 consecutive words) to the 16 bits of the destination word. LINE @LINE 0 0 0 1 1 1 1 0 0 0 1 0 0 0 0 1 S: 1st source 1 1 0 1 0 0 1 0 0 1 1 1 0 0 0 1...
Page 101 Symbol/Operand Function Location Page Mnemonic Execution condition Code SIGNED BCD TO Output Converts one word of signed BCD data to one word of signed binary BINS(470) BINARY Required data. BINS @BINS Signed BCD format specified in C Signed binary Signed BCD...
Page 102 (CS/CJ-series S: ASCII text CPU Units with D: Numeric unit version 4.0 or later only) ASCII TO EIGHT- Converts 8 characters of ASCII data to an 8-digit hexadecimal number. Output NUM8 DIGIT NUMBER Required NUM8 @NUM8 (CS/CJ-series S: ASCII text...
Page 103: Logic Instructions
Function Location Page Mnemonic Execution condition Code LOGICAL AND Output Takes the logical AND of corresponding bits in single words of word ANDW(034) ANDW Required data and/or constants. @ANDW → R : Input 1 : Input 2 R: Result word...
Page 104 Required @COM Wd→Wd: 1 → 0 and 0 → 1 Wd: Word DOUBLE COM- Output Turns OFF all ON bits and turns ON all OFF bits in Wd and Wd+1. PLEMENT COML(614) Required COML (Wd+1, Wd) → (Wd+1, Wd) @COML...
Page 105: Special Math Instructions
Page Mnemonic Execution condition Code BINARY ROOT Output Computes the square root of the 32-bit binary content of the specified ROTB(620) words and outputs the integer portion of the result to the specified ROTB Required result word. @ROTB S: 1st source...
Page 106: Floating-Point Math Instructions
Function Location Page Mnemonic Execution condition Code FLOATING TO Output Converts a 32-bit floating-point value to 16-bit signed binary data and FIX(450) 16-BIT places the result in the specified result word. Required @FIX Floating-point data (32 bits) S: 1st source...
Page 107 S: 1st source word R: 1st result word Result (degrees, 32-bit floating-point data) SINE Output Calculates the sine of a 32-bit floating-point number (in radians) and SIN(460) Required places the result in the specified result words. @SIN Source (32-bit floating-point...
Page 108 Calculates the arc sine of a 32-bit floating-point number and places ASIN(463) ASIN Required the result in the specified result words. (The arc sine function is the @ASIN inverse of the sine function; it returns the angle that produces a given sine value between 1 and 1.)
Page 109 ATAN(465) ATAN Required places the result in the specified result words. (The arc tangent @ATAN function is the inverse of the tangent function; it returns the angle that produces a given tangent value.) Source (32-bit S: 1st source floating-point word...
Page 110 FLOATING SYM- Compares the specified single-precision data (32 bits) or constants Using LD: BOL COMPARI- and creates an ON execution condition if the comparison result is true. Not required SON (CS1-H, Symbol, option Three kinds of symbols can be used with the floating-point symbol CJ1-H, CJ1M, or comparison instructions: LD (Load), AND, and OR.
Page 111: Double-Precision Floating-Point Instructions
Execution condition Code DOUBLE FLOAT- Converts the specified double-precision floating-point data (64 bits) to 16- Output ING TO 16-BIT bit signed binary data and outputs the result to the destination word. FIXD(841) Required BINARY FIXD @FIXD S: 1st source word...
Page 112 S: 1st source word R: 1st result word DOUBLE SINE Calculates the sine of the angle (radians) in the specified double-precision Output floating-point data (64 bits) and outputs the result to the result words. SIND(851) SIND Required @SIND S: 1st source...
Page 113 (64 bits) and outputs the result to the Required result words. (The arc sine function is the inverse of the sine function; it ASIND returns the angle that produces a given sine value between -1 and 1.)
Page 114 Code DOUBLE LOGA- Calculates the natural (base e) logarithm of the specified double-precision Output RITHM LOGD(859) floating-point data (64 bits) and outputs the result to the result words. Required LOGD @LOGD S: 1st source word R: 1st result word...
Page 115 TB+2 TB+2 address PUSH(632) TB+3 TB+3 S: Source word LAST IN FIRST Output Reads the last word of data written to the specified stack (the newest LIFO(634) Required data in the stack). LIFO @LIFO Stack Internal I/O Internal I/O pointer...
Page 116 Page Mnemonic Execution condition Code DIMENSION Output Defines a record table by declaring the length of each record and the RECORD TABLE DIM(631) Required number of records. Up to 16 record tables can be defined. @DIM Table number (N) Record 1 N: Table number LR ×...
Page 117 Min. value word R1+(W −1) R1: 1st word in range D: Destination word Output Adds the bytes or words in the range and outputs the result to two SUM(184) Required words. @SUM C: 1st control word R1: 1st word in R1+(W−1)
Page 118 Instruction Symbol/Operand Function Location Page Mnemonic Execution condition Code STACK SIZE Counts the amount of stack data (number of words) in the specified stack. Output READ (CS1-H, required SNUM(638) CJ1-H, CJ1M, or CS1D only) SNUM @SNUM TB: First stack address...
Page 119: Data Control Instructions
CJ1M only) S: Input word C: 1st parameter word D: Output word LIMIT CONTROL Output Controls output data according to whether or not input data is within LMT(680) Required upper and lower limits. @LMT Upper limit S: Input word...
Page 120 TIME-PROPOR- Inputs the duty ratio or manipulated variable from the specified word, Output TIONAL OUTPUT converts the duty ratio to a time-proportional output based on the spec- Required TPO (685) ified parameters, and outputs the result from the specified output.
Page 121 SCALING 2 Output Converts signed binary data into signed BCD data according to the SCL2(486) SCL2 Required specified linear function. An offset can be input in defining the linear @SCL2 function. Positive Offset Negative Offset R (signed BCD) R (signed BCD)
Page 122 SCALING 3 Output Converts signed BCD data into signed binary data according to the SCL3(487) SCL3 Required specified linear function. An offset can be input in defining the linear @SCL3 function. Positive Offset Negative Offset R (signed binary) R (signed binary)
Page 123: Subroutine Instructions
MACRO Output Calls the subroutine with the specified subroutine number and MCRO(099) MCRO Required executes that program using the input parameters in S to S+3 and the @MCRO output parameters in D to D+3. MCRO(099) N: Subroutine number S: 1st input...
Page 124: Interrupt Control Instructions
Both I/O interrupt tasks and scheduled interrupt tasks (Not supported are masked (disabled) when the PC is first turned on. by CS1D CPU MSKS(690) can be used to unmask or mask I/O interrupts and Units for Duplex- set the time intervals for scheduled interrupts. CPU Systems.)
Page 125 CLEAR Output Clears or retains recorded interrupt inputs for I/O interrupts CLI(691) INTERRUPT Required or sets the time to the first scheduled interrupt for scheduled (Not supported interrupts. by CS1D CPU Units for Duplex- N = 0 to 3 CPU Systems.)
Page 126: High-Speed Counter And Pulse Output Instructions
(number of revolutions) or Required VERT converts the counter PV to the total number of revolutions. The result is output to the destination words as 8-digit hexadecimal. Pulses can be PRV2 input from high-speed counter 0 only.
Page 127 Instruction Symbol/Operand Function Location Page Mnemonic Execution condition Code SET PULSES PULS(886) is used to set the number of pulses for pulse output. Output PULS PULS Required @PULS P: Port specifier T: Pulse type N: Number of pulses PULSE OUTPUT...
Page 128: Step Instructions
E: End word I/O refreshing SPECIAL I/O Performs I/O refreshing immediately for the specified Special I/O Unit's Output UNIT I/O FIORF(225) allocated CIO Area and DM Area words.t with the specified unit num- Required REFRESH ber. (CJ1-H-R only) FIORF N: Unit number...
Page 129 Reads the value set on an external digital switch (or thumbwheel Output DSW (210) INPUT switch) connected to an Input Unit or Output Unit and stores the 4-digit Required or 8-digit BCD data in the specified words. (CS/CJ-series CPU Unit Ver. 2.0...
Page 130 HEXADECIMAL Reads numeric data from a hexadecimal keypad connected to an Input Output KEY INPUT HKY (212) Unit and Output Unit and stores up to 8 digits of hexadecimal data in Required the specified words. (CS/CJ-series CPU Unit Ver. 2.0...
Page 131 Location Page Mnemonic Execution condition Code INTELLIGENT I/O Output Reads the contents of the memory area for the Special I/O Unit READ IORD(222) Required or CPU Bus Unit (see note). IORD @IORD Unit number of Special I/O Unit C: Control data...
Page 132: Serial Communications Instructions
N: Number of bytes to store 0000 to 0100 hex (0 to 256 decimal) TRANSMIT VIA Outputs the specified number of bytes of data from the serial port of a Output 1005 TXDU(256) SERIAL COMMU- Serial Communications Unit (version 1.2 or later). The data is output in...
Page 133: Network Instructions
Location Page Mnemonic Execution condition Code RECEIVE VIA Reads the specified number of bytes of data from the serial port of a Output 1013 RXDU(255) SERIAL COMMU- Serial Communications Unit (version 1.2 or later). The data is read in Required...
Page 134 S: 1st word of send message D: 1st word of received message C: 1st control word EXPLICIT GET Reads status information with an explicit message (Get Attribute Sin- Output 1074 EGATR (721) ATTRIBUTE gle, Service Code: 0E hex). Required EGATR (CS/CJ-series CPU Unit Ver.
Page 135 Function Location Page Mnemonic Execution condition Code EXPLICIT WORD Reads data to the local CPU Unit from a remote CPU Unit in the net- Output 1087 READ work. (The remote CPU Unit must support explicit messages.) Required ECHRD (723) ECHRD (CS/CJ-series CPU Unit Ver.
Page 136: File Memory Instructions
Execution condition Code READ DATA FILE Output 1099 Reads the specified data or amount of data from the specified data file FREAD(700) FREAD Required in file memory to the specified data area in the CPU Unit. @FREAD Starting read ad-...
Page 137 Reads ASCII data from I/O memory and stores that data in the Memory Output 1113 TWRIT FILE Card as a text file (writing a new file or appending a file). The data is Required stored in the TXT format. TWRIT @TWRIT...
Page 138: Display Instructions
Instruction Symbol/Operand Function Location Page Mnemonic Execution condition Code DISPLAY Reads the specified sixteen words of extended ASCII and displays the Output 1119 MSG(046) MESSAGE message on a Peripheral Device such as a Programming Console. Required @MSG N: Message number...
Page 139: Debugging Instructions
Function Location Page Mnemonic Execution condition Code TRACE When TRSM(045) is executed, the status of a preselected bit or word Output 1136 TRSM(045) MEMORY is sampled and stored in Trace Memory. TRSM(045) can be used any- Not required SAMPLING where in the program, any number of times.
Page 140: Failure Diagnosis Instructions
FPD(269) Required between execution of FPD(269) and execution of a diagnostic output and finding which input is preventing an output from being turned ON. Time monitoring function: Starts timing when execution condition A goes ON. Generates a non-fatal error if output B isn't turned ON within the monitoring time.
Page 141: Other Instructions
Output 1167 EMBC(281) BANK Required EMBC @EMBC N: EM bank number EXTEND Extends the maximum cycle time, but only for the cycle in which this Output 1169 WDT(094) MAXIMUM instruction is executed. Required CYCLE TIME @WDT T: Timer setting SAVE CONDI- Saves the status of the condition flags.
Page 142: Block Programming Instructions
@IOSP ENABLE Enables peripheral servicing that was disabled by IOSP(287) for pro- Output 1185 IORS(288) PERIPHERAL gram execution in one of the Parallel Processing Modes or Peripheral Not required SERVICING Servicing Priority Mode. (CS1D CPU Unit for Single-CPU Systems, CS1-H,...
Page 143 Block program n. This block program will now be executed as long as bit "a" is ON. CONDITIONAL EXIT(806) Block program 1199 EXIT(806) without an operand bit exits the program if the execution BLOCK EXIT condition is ON. Required EXIT B: Bit operand Execution...
Page 144 OFF. (NOT) B: Bit operand IF NOT CONDITIONAL If the ELSE(803) instruction is omitted and the operand bit is ON, the Block program 1196 BLOCK instructions between IF(802) and IEND(804) will be executed...
Page 145 "C" executed. executed. executed. Wait ONE CYCLE AND WAIT(805) If the operand bit is OFF (ON for WAIT NOT(805)), the rest of the Block program 1202 WAIT instructions in the block program will be skipped. In the next cycle, Required...
Page 146 Code COUNTER WAIT CNTW(814) Block program 1209 Delays execution of the rest of the block program until the specified count CNTW Required has been achieved. Execution will be continued from the next instruction after CNTW(814)/CNTWX(818) when the counter counts out.
Page 147 LEND LEND (810) Block program 1215 If the operand bit is OFF for LEND(810) (or ON for LEND(810) NOT), LEND Required execution of the loop is repeated starting with the next instruction after LOOP(809). If the operand bit is ON for LEND(810) (or OFF for...
Page 148: Text String Processing Instructions
S1: Text string first word S2: Number of characters D: First destination word GET STRING Output 1228 Reads a designated number of characters from the right (end) of a RIGHT RGHT$(653) Required text string. RGHT$ @RGHT$ S1: Text string first word...
Page 149 Required @LEN$ S: Text string first word D: 1st destination word REPLACE IN Output 1237 Replaces a text string with a designated text string from a designated STRING RPLC$(654) Required position. RPLC$ @RPLC$ S1: Text string first word S2: Replacement...
Page 150 String Compari- Sting comparison instructions (=$, <>$, <$, <=$, >$, >=$) compare two 1250 text strings from the beginning, in terms of value of the ASCII codes. If LD: Not Symbol the result of the comparison is true, an ON execution condition is cre-...
Page 151: Task Control Instructions
TKON(820) TKON Required @TKON The specified task's task number The specified task's task number is higher than the local task's is lower than the local task's task N: Task number task number (m<n). number (m>n). Task m Task m comes...
Page 152: Model Conversion Instructions (Cpu Unit Ver. 3.0 Or Later Only)
Output 1266 Transfers the source word to a destination word calculated by adding DISTC(566) DISTRIBUTE Required an offset value to the base address. Can also write to a stack (Stack DISTC Push Operation). @DISTC S: Source word Bs: Destination base address...
Page 153: Special Function Block Instructions
Outputs the FINS command variable type (data area) code and word Output 1277 GETID(286) address for the specified variable or address. This instruction is gener- Required ally used to get the assigned address of a variable in a function block. GETID @GETID S: Variable or address D1: ID code...
Page 154: Alphabetical List Of Instructions By Mnemonic
Alphabetical List of Instructions by Mnemonic Section 2-3 Alphabetical List of Instructions by Mnemonic Mnemonic Instruction Function code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification ACCELERATION CON- @ACC TROL ACOS ARC COSINE @ACOS ACOSD DOUBLE ARC @ACOSD COSINE @AND...
Page 155 Section 2-3 Alphabetical List of Instructions by Mnemonic Mnemonic Instruction Function code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification AND >L AND DOUBLE GREATER THAN AND >S AND SIGNED GREATER THAN AND >SL AND DOUBLE SIGNED GREATER THAN AND LD...
Page 156 Section 2-3 Alphabetical List of Instructions by Mnemonic Mnemonic Instruction Function code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification ASLL DOUBLE SHIFT LEFT @ASLL ARITHMETIC SHIFT @ASR RIGHT ASRL DOUBLE SHIFT @ASRL RIGHT ATAN ARC TANGENT @ATAN ATAND DOUBLE ARC TAN-...
Page 157 Alphabetical List of Instructions by Mnemonic Section 2-3 Mnemonic Instruction FUN code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification CLEAR INTERRUPT @CLI CLR$ CLEAR STRING @CLR$ 1245 CMND DELIVER COMMAND @CMND 1056 COMPARE !CMP CMPL DOUBLE COMPARE RESET TIMER/...
Page 158 Section 2-3 Alphabetical List of Instructions by Mnemonic Mnemonic Instruction FUN code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification DISTC SINGLE WORD @DISTC 1266 DISTRIBUTE DLNK CPU BUS UNIT I/O @DLNK REFRESH DMPX DATA ENCODER @DMPX DOWN CONDITION OFF...
Page 159 Section 2-3 Alphabetical List of Instructions by Mnemonic Mnemonic Instruction FUN code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification FOR-NEXT LOOPS FAILURE POINT 1156 DETECTION FREAD READ DATA FILE @FREAD 1099 FRMCV CONVERT ADDRESS @FRMCV 1174 FROM CV FSTR...
Page 160 Section 2-3 Alphabetical List of Instructions by Mnemonic Mnemonic Instruction FUN code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification IOSP DISABLE PERIPH- @IOSP 1183 ERAL SERVICING IOWR INTELLIGENT I/O @IOWR WRITE Mnemonic Instruction FUN code Upward Downward Immediate Page...
Page 161 Alphabetical List of Instructions by Mnemonic Section 2-3 Mnemonic Instruction FUN code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification LD =D LOAD DOUBLE FLOATING EQUAL LD =DT LOAD TIME EQUAL LD =F LOAD FLOATING EQUAL LD =L LOAD DOUBLE...
Page 162 Alphabetical List of Instructions by Mnemonic Section 2-3 Mnemonic Instruction FUN code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification LD >=L LOAD DOUBLE GREATER THAN OR EQUAL LD >=S LOAD SIGNED GREATER THAN OR EQUAL LD >=SL LOAD DOUBLE...
Page 163 Section 2-3 Alphabetical List of Instructions by Mnemonic Mnemonic Instruction FUN code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification MTIM MULTI-OUTPUT TIMER MTIMX MULTI-OUTPUT TIMER MATRIX INPUT MOVE NOT @MVN MVNL DOUBLE MOVE NOT @MVNL Mnemonic Instruction FUN code...
Page 164 Alphabetical List of Instructions by Mnemonic Section 2-3 Mnemonic Instruction FUN code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification OR <DT OR TIME LESS THAN OR <F OR FLOATING LESS THAN OR <L OR DOUBLE LESS THAN OR <S...
Page 165 Section 2-3 Alphabetical List of Instructions by Mnemonic Mnemonic Instruction FUN code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification OR >=D OR DOUBLE FLOAT- ING GREATER THAN OR EQUAL OR >=DT OR TIME GREATER THAN OR EQUAL OR >=F...
Page 166 Section 2-3 Alphabetical List of Instructions by Mnemonic Mnemonic Instruction FUN code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification RLNL DOUBLE ROTATE @RLNL LEFT WITHOUT CARRY ROTATE LEFT @ROL ROLL DOUBLE ROTATE @ROLL LEFT ROOT BCD SQUARE ROOT @ROOT...
Page 167 Alphabetical List of Instructions by Mnemonic Section 2-3 Mnemonic Instruction FUN code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification SPED SPEED OUTPUT @SPED SQRT SQUARE ROOT @SQRT SQRTD DOUBLE SQUARE @SQRTD ROOT SRCH DATA SEARCH @SRCH ONE DIGIT SHIFT...
Page 168 Section 2-3 Alphabetical List of Instructions by Mnemonic Mnemonic Instruction FUN code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification TOCV CONVERT ADDRESS @TOCV 1179 TO CV TIME-PROPOR- TIONAL OUTPUT TRSM TRACE MEMORY 1136 SAMPLING TTIM ACCUMULATIVE TIMER TTIMX ACCUMULATIVE...
Page 169 Section 2-3 Alphabetical List of Instructions by Mnemonic Mnemonic Instruction FUN code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification AREA RANGE COM- PARE ZCPL DOUBLE AREA RANGE COMPARE ZONE DEAD ZONE @ZONE CONTROL Symbols Mnemonic Instruction FUN code Upward...
Page 170 Section 2-3 Alphabetical List of Instructions by Mnemonic Mnemonic Instruction FUN code Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification –BL DOUBLE BCD @–BL SUBTRACT WITHOUT CARRY –C SIGNED BINARY @–C SUBTRACT WITH CARRY –CL DOUBLE SIGNED @–CL BINARY SUBTRACT...
Page 171: List Of Instructions By Function Code
Section 2-4 List of Instructions by Function Code List of Instructions by Function Code Function code Mnemonic Instruction Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification LOAD LD NOT LOAD NOT !LD NOT @AND %AND !AND AND NOT AND NOT...
Page 172 Section 2-4 List of Instructions by Function Code Function code Mnemonic Instruction Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification XNRW EXCLUSIVE NOR @XNRW SET CARRY @STC 1166 CLEAR CARRY @CLC 1166 TRSM TRACE MEMORY 1136 SAMPLING DISPLAY MESSAGE @MSG...
Page 173 Section 2-4 List of Instructions by Function Code Function code Mnemonic Instruction Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification BPRG BLOCK PROGRAM 1191 BEGIN IORF I/O REFRESH @IORF RECV NETWORK RECEIVE @RECV 1050 MCRO MACRO @MCRO SIGNED BINARY !CPS...
Page 174 Section 2-4 List of Instructions by Function Code Function code Mnemonic Instruction Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification FRMCV CONVERT ADDRESS @FRMCV 1174 FROM CV TOCV CONVERT ADDRESS @TOCV 1179 TO CV GETID GET VARIABLE ID @GETID 1277...
Page 175 Section 2-4 List of Instructions by Function Code Function code Mnemonic Instruction Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification OR <S OR SIGNED LESS THAN AND <SL AND DOUBLE SIGNED LESS THAN LD <SL LOAD DOUBLE SIGNED LESS THAN OR <SL...
Page 176 Section 2-4 List of Instructions by Function Code Function code Mnemonic Instruction Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification OR GREATER THAN OR EQUAL AND DOUBLE GREATER THAN OR EQUAL LOAD DOUBLE GREATER THAN OR EQUAL OR DOUBLE GREATER THAN OR...
Page 177 Section 2-4 List of Instructions by Function Code Function code Mnemonic Instruction Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification OR >=F OR FLOATING GREATER THAN OR EQUAL AND =D AND DOUBLE FLOAT- ING EQUAL LD =D LOAD DOUBLE FLOATING EQUAL...
Page 178 Section 2-4 List of Instructions by Function Code Function code Mnemonic Instruction Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification LD <= DT LD TIME LESS THAN OR EQUAL OR <= DT OR TIME LESS THAN OR EQUAL AND > DT...
Page 179 Section 2-4 List of Instructions by Function Code Function code Mnemonic Instruction Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification SIGNED BINARY MULTIPLY DOUBLE SIGNED BINARY MULTIPLY UNSIGNED BINARY MULTIPLY DOUBLE UNSIGNED @*UL BINARY MULTIPLY BCD MULTIPLY DOUBLE BCD @*BL...
Page 180 Section 2-4 List of Instructions by Function Code Function code Mnemonic Instruction Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification BDSL DOUBLE SIGNED @BDSL BINARY TO BCD GRAY CODE CON- @GRY VERSION SINQ HIGH-SPEED SINE @SINQ COSQ HIGH-SPEED COSINE @COSQ...
Page 181 List of Instructions by Function Code Section 2-4 Function code Mnemonic Instruction Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification MTIMX MULTI-OUTPUT TIMER TTIMX ACCUMULATIVE TIMER TIMUX TENTH-MS TIMER TMUHX HUNDREDTH-MS TIMER MOVR MOVE TO REGISTER @MOVR MOVRW MOVE TIMER/...
Page 182 List of Instructions by Function Code Section 2-4 Function code Mnemonic Instruction Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification STR8 EIGHT-DIGIT NUMBER @STR8 TO ASCII STR16 SIXTEEN-DIGIT NUM- @STR16 BER TO ASCII NUM4 ASCII TO FOUR-DIGIT @NUM4 NUMBER NUM8...
Page 183 Section 2-4 List of Instructions by Function Code Function code Mnemonic Instruction Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification LD <>$ LOAD STRING NOT 1250 EQUAL OR <>$ OR STRING NOT 1250 EQUAL AND <$ AND STRING LESS 1250 THAN LD <$...
Page 184 List of Instructions by Function Code Section 2-4 Function code Mnemonic Instruction Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification DATE CLOCK ADJUSTMENT @DATE 1134 GSBS GLOBAL SUBROU- @GSBS TINE CALL GSBN GLOBAL SUBROU- TINE ENTRY GRET GLOBAL SUBROU- TINE RETURN...
Page 185 Section 2-4 List of Instructions by Function Code Function code Mnemonic Instruction Upward Downward Immediate Page Differentiation Differentiation Refreshing Specification DOUBLE FLOATING- POINT SUBTRACT DOUBLE FLOATING- POINT MULTIPLY DOUBLE FLOATING- POINT DIVIDE RADD DOUBLE DEGREES @RADD TO RADIANS DEGD DOUBLE RADIANS TO...
Page 186 Section 2-4 List of Instructions by Function Code...
Page 187: Instructions
Upgrades for CS1-H/CJ1-H CPU Units ........
Page 188 MULTIPLE COMPARE: MCMP(019) ........
Page 189 3-11-25 UNSIGNED BINARY DIVIDE: /U(432) ........
Page 190 3-13-2 DOUBLE LOGICAL AND: ANDL(610) ........
Page 191 3-17-6 SET RECORD LOCATION: SETR(635) ........
Page 192 3-23-11 INTELLIGENT I/O WRITE: IOWR(223) ........
Page 193 3-28-2 CALENDAR SUBTRACT: CSUB(731) ........
Page 194 3-35-6 GET VARIABLE ID: GETID(286) ........
Page 195: Notation And Layout Of Instruction Descriptions
Item Contents Name and Mnemonic The heading of each section consists of the name of the instruction followed by the mnemonic with the function code in parentheses. Example: MOVE BIT: MOVB(082) Purpose The basic purpose of the instruction is described after the section heading.
Page 196 The memory areas addresses that can be used each operand are listed in a table like the following one. The letters used in the column headings on the left are the same as those used in the ladder symbol. “---” is used to indicate when an area can- not be specific for an operand.
Page 197 Section 3-1 Notation and Layout of Instruction Descriptions • Operands Indicating Control Numbers (Except for Jump Numbers): The decimal form is given for control numbers, e.g., “0 to 1023” is given for the N operand for the SBS(091) instruction. Examples In the examples, constants are given using the CX-Programmer notation, e.g.,...
Page 198: Instruction Upgrades And New Instructions
DIVL Interrupt Control MSKS / MSKR / CLIDI / EI Instruction Upgrades and New Instructions This section lists the instruction upgrades for CS1 CPU Units with the -EV1 suffix and CS1-H/CJ1-H CPU Units. 3-2-1 Upgrades for CS1-H/CJ1-H CPU Units New Instructions The following instructions have been added to the CS1-H and CJ1-H CPU Units.
Page 199 AREA RANGE COMPARE, ZCP(088) DOUBLE AREA RANGE COMPARE, ZCPL(116) Floating Point Calculation and Conversion Instructions Floating Point Data Comparison Instructions: =F, <>F, <F, <=F, >F, and >=F (329 to 334) FLOATING POINT TO ASCII, FSTR(448) ASCII TO FLOATING POINT, VAL(449) Double-precision Floating Point Calculation and Conversion Instructions Double-precision Comparison Instructions: =D, <>D, <D, <=D, >D, and >=D (335 to...
Page 200 Section 3-2 Instruction Upgrades and New Instructions New Instructions The following instructions have been upgraded for the CS1-H and CJ1-H CPU Units. Special Math Instructions ARITHMETIC PROCESS, APR(069) Failure Diagnosis Instructions FAILURE ALARM, FAL(006) SEVERE FAILURE ALARM, FALS(007)
Page 201: Sequence Input Instructions
C0000 to C4095 Task Flag Area TK0000 to TK0031 Condition Flags ER, CY, N, OF, UF, >, =, <, >=, <>, <=, A1, A0 Clock Pulses 0.02 s, 0.1 s, 0.2 s, 1 s, 1 min TR Area TR0 to TR15...
Page 202 , –(– –)IR0 to, –(– –)IR15 Description LD is used for the first normally open bit from the bus bar or for the first nor- mally open bit of a logic block. If there is no immediate refreshing specifica- tion, the specified bit in I/O memory is read. If there is an immediate refreshing specification, the status of the Basic Input Unit’s input terminal is...
Page 203: Load Not: Ld Not
Note 1. The following variations are supported by only the CS1-H, CJ1-H, CJ1M, or CS1D CPU Units: @LD NOT, %LD NOT, !@LD NOT, and !%LD NOT. 2. Immediate refreshing is not supported by CS1D CPU Units for Duplex- CPU Systems.
Page 204 ,–(– –)IR0 to, –(– –)IR15 Description LD NOT is used for the first normally closed bit from the bus bar, or for the first normally closed bit of a logic block. If there is no immediate refreshing specifi- cation, the specified bit in I/O memory is read and reversed. If there is an immediate refreshing specification, the status of the Basic Input Unit’s input...
Page 205: And: And
Immediate refreshing (!) can be specified for LD NOT. An immediate refresh instruction updates the status of the input bit just before the instruction is exe- cuted for Basic Input Units (but not Basic Input Units on Slave Racks or for C200H Group 2 Multi-point Input Units).
Page 206 (@) is specified, the execution condition is turned ON for one cycle only after the status of the operand bit goes from OFF to ON. If differen- tiate down (%) is specified, the execution condition is turned ON for one cycle only after the status of the operand bit goes from ON to OFF.
Page 207: And Not: And Not
AND LD 000006 3-3-4 AND NOT: AND NOT Purpose Reverses the status of the specified operand bit and takes a logical AND with the current execution condition. Ladder Symbol Variations Variations Creates ON Each Cycle AND NOT Result is ON...
Page 208 AND NOT is used for a normally closed bit connected in series. AND NOT cannot be directly connected to the bus bar, and cannot be used at the begin- ning of a logic block. If there is no immediate refreshing specification, the specified bit in I/O memory is read.
Page 209: Or: Or
OR LD AND LD 000006 3-3-5 OR: OR Purpose Takes a logical OR of the ON/OFF status of the specified operand bit and the current execution condition. Bus bar Ladder Symbol Variations Variations Creates ON Each Cycle OR Result is ON...
Page 210 OR is used for a normally open bit connected in parallel. A normally open bit is configured to form a logical OR with a logic block beginning with a LOAD or LOAD NOT instruction (connected to the bus bar or at the beginning of the logic block).
Page 211: Or Not: Or Not
Sequence Input Instructions Section 3-3 3-3-6 OR NOT: OR NOT Purpose Reverses the status of the specified bit and takes a logical OR with the current execution condition. Ladder Symbol Bus bar Variations Variations Creates ON Each Cycle OR NOT Result is ON...
Page 212: And Load: And Ld
OR NOT is used for a normally closed bit connected in parallel. A normally closed bit is configured to form a logical OR with a logic block beginning with a LOAD or LOAD NOT instruction (connected to the bus bar or at the beginning of the logic block).
Page 213 ON (i.e., when either CIO 000000 or CIO 000001 is ON) and either of the execution condi- tions in the right logic block is ON (i.e., when either CIO 000002 is ON or CIO 000003 is OFF).
Page 214: Or Load: Or Ld
AND LOAD is not more than eight. To use nine or more, program using method (1). If there are nine or more with method (2), then a program error will occur during the program check by the Peripheral Device.
Page 215 Three or more logic blocks can be connected in parallel using this instruction to first connect two of the logic blocks and then to connect the next and subse- quent ones in order. It is also possible to continue placing this instruction after three or more logic blocks and connect them together in parallel.
Page 216 OR LOAD is not more than eight. To use nine or more, pro- gram using method (1). If there are nine or more with method (2), then a pro- gram error will occur during the program check by the Peripheral Device.
Page 217: Differentiated And Immediate Refreshing Instructions
Ordinary and differentiated instructions are executed using data input by pre- vious I/O refresh processing, and the results are output with the next I/O pro- cessing. Here “I/O refreshing” means the data exchanged between the CPU’s internal memory and the I/O Unit.
Page 218: Operation Timing For I/O Instructions
I/O refreshing 3-3-11 TR Bits TR bits are used to temporarily retain the ON/OFF status of execution condi- tions in a program when programming in mnemonic code. They are not used when programming directly in ladder program form because the processing is automatically executed by the Peripheral Device.
Page 219 The following diagram shows one case in which a TR bit is unnecessary and one in which a TR bit is required. In instruction block (1), the ON/OFF status at point A is the same as for output CIO 00200, so AND 000001 and OUT 000201 can be coded without requiring a TR bit.
Page 220: Not: Not(520)
Section 3-3 Sequence Input Instructions TR0 to TR15 output A TR bit address cannot be repeated within the same block in a program with Duplication many output branches, as shown in the following diagram. It can, however, be used again in a different block.
Page 221: Condition On/Off: Up(521) And Down(522)
UP(521) or DOWN(522). The operation of UP(521) and DOWN(522) depends on the execution condi- tion for the instruction as well as the execution condition for the program sec- tion when it is programmed in an interlocked program section, a jumped...
Page 222: Bit Test: Tst(350) And Tstn(351)
LD TSTN(351), AND TSTN(351), and OR TSTN(351) are used in the program like LD NOT, AND NOT, and OR NOT; the execution condition is OFF when the specified bit in the specified word is ON, and ON when the bit is OFF.
Page 223 N: Bit number The bit number must be between 0000 and 000F hexadecimal or between &0000 and &0015 decimal. Only the rightmost bit (0 to F hexadecimal) of the contents of the word is valid when a word address is specified.
Page 224 LD NOT, AND NOT, and OR NOT; the execution condition is OFF when the specified bit in the specified word is ON and ON when the bit is OFF. Unlike LD NOT, AND NOT, and OR NOT, bits in the DM and EM areas can be used as operands in TSTN(351).
Page 225: Sequence Output Instructions
5 of D00010 is OFF. &5 OR TST(350) and OR TSTN(351) In the following example, CIO 000001 is turned ON when CIO 000000 or bit 3 of D00010 is ON. &3 In the following example, CIO 000001 is turned ON when CIO 000000 is ON or bit 3 of D00010 is OFF.
Page 226 Description If there is no immediate refreshing specification, the status of the execution condition (power flow) is written to the specified bit in I/O memory. If there is an immediate refreshing specification, the status of the execution condition (power flow) is also written to the Basic Output Unit’s output terminal in addi- tion to the output bit in I/O memory.
Page 227: Output Not: Out Not
000002 Note Difference between SET/RSET and OUT For OUT, the operand bit is turned ON when the input condition turns ON and is turned OFF when the input condition turns OFF. For SET and RSET, the operand bit turns ON or OFF, respectively, when the input condition turns ON and the operand bit does not change when the input condition turns OFF.
Page 228: Keep: Keep(011)
Description If there is no immediate refreshing specification, the status of the execution condition (power flow) is reversed and written to a specified bit in I/O memory. If there is an immediate refreshing specification, the status of the execution condition (power flow) is reversed and also written to the Basic Output Unit’s output terminal in addition to the output bit in I/O memory.
Page 229 ,–(– –) IR0 to, –(– –) IR15 Description When S turns ON, the designated bit will go ON and stay ON until reset, regardless of whether S stays ON or goes OFF. When R turns ON, the desig- nated bit will go OFF. The relationship between execution conditions and KEEP(011) bit status is shown below.
Page 230 (The changes will not be reflected immediately if the bit is allocated to a Group-2 High-density I/O Unit, High-density Special I/O Unit, or a Unit mounted in a SYSMAC BUS Remote I/O Slave Rack.) KEEP(011) operates like the self-maintaining bit, but a self-maintaining bit programmed with KEEP(011) requires one less instruction.
Page 231 KEEP(011) can be used to create flip-flops as shown below. If a holding bit is used for B, the bit status will be retained even during a power interruption. KEEP(011) can thus be used to program bits that will maintain status after restarting the PLC following a power interruption.
Page 232 Section 3-4 Sequence Output Instructions the input device) can cause the operand bit of KEEP(011) to be reset. This sit- uation is shown below. Input Unit KEEP 120000 NEVER The operands for KEEP(011) are input in a different order in ladder diagrams and mnemonic code.
Page 233: Differentiate Up/Down: Difu(013) And Difd(014)
DIFFERENTIATE UP/DOWN: DIFU(013) and DIFD(014) Purpose DIFU(013) turns the designated bit ON for one cycle when the execution con- dition goes from OFF to ON (rising edge). DIFD(014) turns the designated bit ON for one cycle when the execution con- dition goes from ON to OFF (falling edge).
Page 234 CLEAR: IL(002) and ILC(003), 3-5-6 JUMP and JUMP END: JMP(004) and JME(005), and 3-20 Interrupt Control Instructions for details. If DIFU(013) is used in a FOR-NEXT loop and the loop repeats in a cycle, the controlled bit will be always ON or always OFF within that loop.
Page 235: Set And Reset: Set And Rset
The operation of DIFU(013) will not be consistent if the same function block instance is executed more than once in the same cycle. An instance will not be executed while EN is OFF. Caution is thus required when using DIFU(013) in a function block definition. For details, refer to infor- mation on restrictions on using ladder programming instructions in the CX- Programmer Operation Manual: Function Blocks.
Page 236 Immediately for Upward Differentiation (See note.) Executed Once and Bit Refreshed !%SET Immediately for Downward Differentiation (See note.) Note Immediate refreshing is not supported by CS1D CPU Units. Variations Executed Each Cycle for ON Condition RSET Executed Once for Upward Differentiation @RSET Executed Once for Downward Differentiation %RSET Immediate Refreshing Specification (See note.)
Page 237 RSET turns the operand bit OFF when the execution condition is ON, and does not affect the status of the operand bit when the execution condition is OFF. Use SET to turn ON a bit that has been turned OFF with RSET. Execution condition...
Page 238: Multiple Bit Set/Reset: Seta(530)/Rsta(531)
Specifies the first word in which bits will be turned ON or OFF. N1: Beginning Bit Specifies the first bit which will be turned ON or OFF. N1 must be #0000 to #000F (&0 to &15). N2: Number of Bits Specifies the number of bits which will be turned ON or OFF.
Page 239 Section 3-4 Sequence Output Instructions Note The bits being turned ON or OFF must be in the same data area. (The range of words is roughly D to D+N2 16.) D: 256 words max. Operand Specifications Area CIO Area CIO 0000 to CIO 6143...
Page 240 Section 3-4 Sequence Output Instructions N2 bits are set to 1 (ON). SETA(530) can be used to turn ON bits in data areas that are normally accessed by words only, such as the DM and EM areas. Operation of RSTA(531) RSTA(531) turns OFF N2 bits, beginning from bit N1 of D, and continuing to the left (more-significant bits).
Page 241: Single Bit Set/Reset: Setb(532)/Rstb(533)
Interrupt tasks Operands D: Word Address Specifies the word in which the bit will be turned ON or OFF. N: Beginning Bit Specifies the bit which will be turned ON or OFF. N must be #0000 to #000F (&0 to &15).
Page 242 The functions of SETB(532) and RSTB(533) are described separately below. Operation of SETB(532) SETB(532) turns ON bit N of word D when the execution condition is ON. The status of the bit is not affected when the execution condition is OFF. Unlike SET, SETB(532) can turn ON a bit in the DM area or EM area.
Page 243 RSTB(533) turns OFF bit N of word D when the execution condition is ON. The status of the bit is not affected when the execution condition is OFF. (Use SETB(532) to turn ON the bit.) Unlike RST, RSTB(533) can turn OFF a bit in the DM area or EM area.
Page 244: Single Bit Output: Outb(534)
Purpose OUTB(534) outputs the status of the instruction’s execution condition to the specified bit. OUTB(534) can control a bit in the DM Area or EM Area, unlike OUT. This instruction is supported by CS1-H, CJ1-H, CJ1M, and CS1D CPU Units only.
Page 245 If the immediate refreshing version is not used, the status of the execution condition (power flow) is written to the specified bit in I/O memory. If the imme- diate refreshing version is used, the status of the execution condition (power flow) is written to the Basic Output Unit’s output terminal as well as the output...
Page 246: Sequence Control Instructions
OUT instruction in an interlocked program section.) When a word is specified for the bit number (N), only bits 00 to 03 of N are used. For example, if N contains FFFA hex, OUTB(534) will control bit 10 of word D.
Page 247: No Operation: Nop(000)
END(001) completes the execution of a program for that cycle. No instructions written after END(001) will be executed. Execution proceeds to the program with the next task number. When the pro- gram being executed has the highest task number in the program, END(001) marks the end of the overall main program.
Page 248: Overview Of Interlock Instructions
• MULTI-INTERLOCK DIFFERENTIATION RELEASE and MULTI-INTER- LOCK CLEAR (MILR(518) and MILC(519))* Note MILR(518) does not hold the status of the Differentiation Flag, so dif- ferentiated instructions that were interlocked are not executed after the interlock is cleared. * These instructions are supported only by CS/CJ-series CPU Unit Ver. 2.0 or later.
Page 249 Section 3-5 Sequence Control Instructions Differences between Differentiated instructions (DIFU, DIFD, or instructions with a @ or % prefix) MILH(517) and MILR(518) operate differently in interlocks created with MILH(517) and MILR(518). The operation of differentiated instructions in an interlock created with MILH(517) is identical to the operation in an interlock created with IL(002).
Page 250: Interlock And Interlock Clear: Il(002) And Ilc
3-5-4 INTERLOCK and INTERLOCK CLEAR: IL(002) and ILC(003) Purpose Interlocks all outputs between IL(002) and ILC(003) when the execution con- dition for IL(002) is OFF. IL(002) and ILC(003) are normally used in pairs. Ladder Symbols IL(002) ILC(003) Variations Variations Interlocks when OFF/Does Not interlock when ON IL(002)
Page 251 MTIM(543), MTIMX(554), SET, RSET, CNT, CNTX(546), CNTR(012), CN- TRX(548), SFT, and KEEP(011) retain their previous status. If there are bits which you want to remain ON in an interlocked program sec- tion, set these bits to ON with SET just before IL(002).
Page 252 Note In CS1-H, CJ1-H, CJ1M, and CS1D (for Single-CPU System) CPU Units, the Equals and Negative Flags are left unchanged. In CS1 and CJ1 CPU Units, the Equals and Negative Flags are turned OFF. Precautions The cycle time is not shortened when a section of the program is interlocked because the interlocked instructions are executed internally.
Page 253 Sequence Control Instructions Examples When CIO 000000 is OFF in the following example, all outputs between IL(002) and ILC(003) are interlocked. When CIO 000000 is ON in the follow- ing example, the instructions between IL(002) and ILC(003) are executed nor- mally.
Page 254: Multi-Interlock Differentiation Hold
N: Interlock Number Operands N: Interlock Number The interlock number must be between 0 and 15. Match the interlock number of the MILH(517) (or MILR(518)) instruction with the same number in the cor- responding MILC(519) instruction. The interlock numbers can be used in any order.
Page 255 Not allowed Description When the execution condition for MILH(517) (or MILR(518)) with interlock number N is OFF, the outputs for all instructions between that MILH(517)/ MILR(518) instruction and the next MILC(519) with interlock number N are interlocked. When the execution condition for MILH(517) (or MILR(518)) with interlock number N is ON, the instructions between that MILH(517)/MILR(518) instruc- tion and the next MILC(519) with interlock number N are executed normally.
Page 256 Sequence Control Instructions The MILH(517)/MILR(518) instruction turns OFF the Interlock Status Bit (operand D) when the interlock is in engaged and turns ON the bit when the interlock is not engaged. Consequently, the Interlock Status Bit can be moni- tored to check whether or not the interlock for a given interlock number is engaged.
Page 257 Partial interlock (Arm RUN) A3 (Arm operation) • A1, A2, and A3 are interlocked when the Emergency Stop Button is • A2 and A3 are interlocked when Conveyor RUN is OFF. • A3 is interlocked when Arm RUN is OFF.
Page 258 MILH(517) and MILR(518). When a program section is interlocked with MILR(518), a differentiated instruction will not be executed when the interlock is cleared even if the differ- entiation condition was activated during the interlock (comparing the status of the execution condition when the interlock started to its status when the inter- lock was cleared).
Page 259 2. The DIFU's CIO 000001 input condition goes from OFF to ON while CIO 000000 is OFF (DIFU interlocked), 3. When CIO 000000 goes from OFF to ON (interlock cleared), DIFU is executed if CIO 000001 is still ON. 000001...
Page 260 2. The DIFU's CIO 000001 input condition goes from OFF to ON while CIO 000000 is OFF (DIFU interlocked), 3. When CIO 000000 goes from OFF to ON (interlock cleared), DIFU is not executed even though CIO 000001 is still ON.
Page 261 001000 Controlling Interlock Status from a Programming Device An interlock can be engaged or released manually by force-resetting or force- setting the Interlock Status Bit (specified with operand D of MILH(517) and MILR(518)) from a Programming Device. The forced status of the Interlock Status Bit has priority and overrides the interlock status calculated by program execution.
Page 262 MILH MILH MILC MILC Unlike the IL(002) interlocks, MILH(517) and MILR(518) interlocks can be nested, so the operation of similar programs will be different if MILH(517) or MILR(518) is used instead of ILC(002). Program with MILH(517)/MILC(519) Interlocks MILH 010000 MILH...
Page 263 ILC(003) interlock.) Not interlocked Not interlocked If there are bits which you want to remain ON in a program section interlocked by MILH(517) or MILR(518), set these bits to ON with SET just before the MILH(517) or MILR(518) instruction. Flags...
Page 264 Sequence Control Instructions Section 3-5 When nesting interlocks, assign interlock numbers so that the nested program section does not exceed the outer program section. MILH MILH MILC The nested program section must not go beyond the outer MILC program section.
Page 265 "a" is OFF, regardless of the ON/OFF status of "b".) MILC If there is an ILC(003) instruction between an MILH(517) and MILC(519) pair, the program section between MILH(517) and ILC(003) will be interlocked. MILH When input condition "a" is OFF, only program section A1 is interlocked.
Page 266 OFF, only program section A2 is interlocked. MILC Note The MILR(518) interlocks operate in the same way if there is another MILH(517) or MILR(518) instruction with the same interlock number between an MILR(518) and MILC(519) pair. If there is an MILC(519) instruction with a different interlock number between an MILH(517)/MILR(518) and MILC(519) pair, that MILC(519) instruction will be ignored.
Page 267 This MILC(519) instruction is ignored. MILC MILC If there is an MILH(517) instruction between an IL(002) and ILC(003) pair and the IL(002) interlock is engaged, the MILH(517) instruction has no effect. In this case, the program section between IL(002) and ILC(003) will be inter- locked.
Page 268: Jump And Jump End: Jmp(004) And Jme
JUMP and JUMP END: JMP(004) and JME(005) Purpose When the execution condition for JMP(004) is OFF, program execution jumps directly to the first JME(005) in the program with the same jump number. JMP(004) and JME(005) are used in pairs. Ladder Symbols...
Page 269 Note For CJ1M-CPU11 and CJ1M-CPU21 CPU Units, the range is #0000 to #00FF (binary) or &0 to &1023 (decimal). Description When the execution condition for JMP(004) is ON, no jump is made and the program is executed consecutively as written. When the execution condition for JMP(004) is OFF, program execution jumps directly to the first JME(005) in the program with the same jump number.
Page 270 Because all of instructions between JMP(004)/CJP(510)/CJPN(511) and JME(005) are skipped when the execution condition for JMP(004) is OFF, the cycle time is reduced by the total execution time of the skipped instructions. In contrast, processing time equivalent to NOP(000) processing is required for instructions between JMP0(515) and JME0(516), so the cycle time is not reduced as much with those jump instructions.
Page 271 JME(005) and JMP(004) will be executed repeatedly as long as the execution condition for JMP(004) is OFF. A Cycle Time Too Long error will occur if the execution condition is not turned ON or END(001) is not executed within the maximum cycle time.
Page 272: Conditional Jump: Cjp(510)/Cjpn(511
The operation of CJP(510) is the basically the opposite of JMP(004). When the execution condition for CJP(510) is ON, program execution jumps directly to the first JME(005) in the program with the same jump number. CJP(510) and JME(005) are used in pairs.
Page 273 IR15 DR0 to DR15, IR0 to IR15 Note For CJ1M-CPU11 and CJ1M-CPU21 CPU Units, the range is #0000 to #00FF (binary) or &0 to &1023 (decimal). Description The operation of CJP(510) and CJPN(511) differs only in the execution condi-...
Page 274 Operation of CJP(510) When the execution condition for CJP(510) is OFF, no jump is made and the program is executed consecutively as written. When the execution condition for CJP(510) is ON, program execution jumps directly to the first JME(005) in the program with the same jump number.
Page 275 OFF (CJP(510)) or ON (CJPN(511)). A Cycle Time Too Long error will occur if the jump is not completed by changing the execution condition executing END(001) within the maximum cycle time.
Page 276: Multiple Jump And Jump End: Jmp0(515) And Jme0
When the execution condition for JMP0(515) is OFF, all instructions from JMP0(515) to the next JME0(516) in the program are processed as NOP(000). Use JMP0(515) and JME0(516) in pairs. There is no limit on the number of pairs that can be used in the program.
Page 277 Section 3-5 Sequence Control Instructions Description When the execution condition for JMP0(515) is ON, no jump is made and the program executed consecutively as written. When the execution condition for JMP0(515) is OFF, all instructions from JMP0(515) to the next JME0(516) in the program are processed as NOP(000).
Page 278: For-Next Loops: For(512)/Next
Executed Each Cycle for ON Condition NEXT(513) Immediate Refreshing Specification Not supported Applicable Program Areas Block program areas Step program areas Subroutines Interrupt tasks Not allowed Operands N: Number of Loops The number of loops must be 0000 to FFFF (0 to 65,535 decimal).
Page 279 The BREAK(514) instruction can be used to cancel the loop. If N is set to 0, the instructions between FOR(512) and NEXT(513) are pro- cessed as NOP(000) instructions. Loops can be used to process tables of data with a minimum amount of pro- gramming. Repeated N times Repeated program section FOR-NEXT loops can be nested up to 15 levels.
Page 280 NOP(000). Breaks FOR-NEXT loop 1. Alternative Looping Methods There are two ways to repeat a program section until a given execution condi- tion is input. 1,2,3... 1. FOR-NEXT Loop with BREAK Start a FOR-NEXT loop with a maximum of N repetitions. Program BREAK(514) within the loop with the desired execution condition.
Page 281: Break Loop: Break(514)
• MULTIPLE JUMP and JUMP END: JMP(515) and JME(516) • STEP DEFINE and STEP START: STEP(008)/SNXT(009) Note If a loop repeats in one cycle and a differentiated bit is used in the FOR-NEXT loop, that bit will be always ON or always OFF within that loop.
Page 282: Timer And Counter Instructions
Not allowed Description Program BREAK(514) between FOR(512) and NEXT(513) to cancel the FOR-NEXT loop when BREAK(514) is executed. When BREAK(514) is exe- cuted, the rest of the instructions up to NEXT(513) are processed as NOP(000). Condition a ON N repetitions Repetitions forced to end.
Page 283 Using binary data instead of BCD allows the SV range for timers and counter to be increased from 0 to 9999 to 0 to 65535. It also enables using binary data calculated with other instructions directly as a timer/counter SV. The refresh method is valid even when setting an SV indirectly (i.e., using the contents of...
Page 284 --- (See note 4.) Note 1. TIM PVs are refreshed at execution, at the end of program execution each cycle, or every 80 ms by interrupt if the cycle time exceeds 80 ms. 2. TIMH(015)/TIMHX(551) PVs are refreshed at execution, at the end of pro- gram execution each cycle, and every 10 ms by interrupt.
Page 285: Hundred-Ms Timer: Tim/Timx(550)
TIM or TIMX(550) operates a decrementing timer with units of 0.1-s. The set- ting range for the set value (SV) is 0 to 999.9 s for TIM and 0 to 6,553.5 s for TIMX(550). The timer accuracy is 0 to 0.01 s.
Page 286 DR0 to DR15, IR0 to IR15 Description When the timer input is OFF, the timer specified by N is reset, i.e., the timer’s PV is reset to the SV and its Completion Flag is turned OFF. When the timer input goes from OFF to ON, TIM/TIMX(550) starts decrement- ing the PV.
Page 287 Flags and PVs will be maintained when the operating mode is changed. 2. If the IOM Hold Bit (A50012) has been turned ON and the status of the IOM Hold Bit itself is protected in the PLC Setup, the status of timer Completion Flags and PVs will be maintained even when the power is interrupted.
Page 288 Note With the CS1D CPU Units, the PV will not be refreshed in the above case. When a TIM/TIMX(550) timer is forced set, its Completion Flag will be turned ON and its PV will be set to 0000.
Page 289: Ten-Ms Timer: Timh(015)/Timhx
Purpose TIMH(015)/TIMHX(551) operates a decrementing timer with units of 10-ms. The setting range for the set value (SV) is 0 to 99.99 s for TIMH(015) and 0 to 655.35 s for TIMHX(551). The timer accuracy is 0 to 0.01 s.
Page 290 DR0 to DR15, IR0 to IR15 Description When the timer input is OFF, the timer specified by N is reset, i.e., the timer’s PV is reset to the SV and its Completion Flag is turned OFF. When the timer input goes from OFF to ON, TIMH(015)/TIMHX(551) starts decrementing the PV.
Page 291 2048 to 4095 will be held when the timer is on standby. The operation of the = Flag and N Flag depends on the model of the CPU Unit. Refer to Flags, above, for details. The Completion Flags for TIMH(015)/TIMHX(551) timers will be updated when the instruction is executed.
Page 292 Flags and PVs will be maintained when the operating mode is changed. 2. If the IOM Hold Bit (A50012) has been turned ON and the status of the IOM Hold Bit itself is protected in the PLC Setup, the status of timer Completion Flags and PVs will be maintained even when the power is interrupted.
Page 293: One-Ms Timer: Tmhh(540)/Tmhhx
Purpose TMHH(540)/TMHHX(552) operates a decrementing timer with units of 1-ms. The setting range for the set value (SV) is 0 to 9.999 s for TMHH(540) and 0 to 65.535 for TMHHX(552). The timer accuracy is –0.001 to 0 s. Note The timer accuracy for CS1D CPU Units is 10 ms + the cycle time. The timer accuracy for unit version 4.1 of the CJ1-H-R CPU Units is 0.01 to 0 s.
Page 294 –2048 to +2047 ,IR0 to –2048 to +2047 ,IR15 DR0 to DR15, IR0 to IR15 Note In CJ1-H-R CPU Units other than those with unit version 4.1, N can be set to between 0 and 4,095 decimal. In CJ1-H-R CPU Units with unit version 4.1, N can be set only to between 16 and 4095 decimal.
Page 295 The present value of a high-speed timer with a timer number from 16 to 4095 will be held if the task is on standby. Timers will be reset or paused in the following cases. (When a timer is reset, its PV is reset to the SV and its Completion Flag is turned OFF.)
Page 296: Tenth-Ms Timer: Timu(541)/Timux(556
For all CPU Units except CS1D CPU Units, the present value of all operating timers with timer numbers 0 to 15 will be refreshed even if the timer is in a pro- gram section that is jumped using JMP(004), CJMP(510), CJPN(511), JME(005).
Page 297 Not allowed Not allowed Operands N: Timer Number The timer number must be between 0000 and 4095 (decimal). S: Set Value The set value must be between #0000 and 9999 (BCD). Operand Specifications Area CIO Area CIO 0000 to CIO 6143...
Page 298 –2048 to +2047 ,IR0 to –2048 to +2047 ,IR15 DR0 to DR15, IR0 to IR15 Description When the timer input is OFF, the timer specified by N is reset, i.e., the timer’s Completion Flag is turned OFF. When the timer input goes from OFF to ON, TIMU(541)/TIMUX(556) starts decrementing the PV.
Page 299: Hundredth-Ms Timer: Tmuh(544)/Tmuhx(557
Flags and PVs will be maintained when the operating mode is changed. 2. If the IOM Hold Bit (A50012) has been turned ON and the status of the IOM Hold Bit itself is protected in the PLC Setup, the status of timer Completion Flags and PVs will be maintained even when the power is interrupted.
Page 300 Not allowed Not allowed Operands N: Timer Number The timer number must be between 0000 and 4095 (decimal). S: Set Value The set value must be between #0000 and 9999 (BCD). Operand Specifications Area CIO Area CIO 0000 to CIO 6143...
Page 301 –2048 to +2047 ,IR0 to –2048 to +2047 ,IR15 DR0 to DR15, IR0 to IR15 Description When the timer input is OFF, the timer specified by N is reset, i.e., the timer’s Completion Flag is turned OFF. When the timer input goes from OFF to ON, TMUH(544)/TMUHX(557) starts decrementing the PV.
Page 302: Accumulative Timer: Ttim(087)/Ttimx(555
Purpose TTIM(087)/TTIMX(555) operates an incrementing timer with units of 0.1-s. The setting range for the set value (SV) is 0 to 999.9 s for TTIM(087) and 0 to 6,553.5 s for TTIMX(555). The timer accuracy is –0.01 to 0 s.
Page 303 Subroutines Interrupt tasks Not allowed Not allowed Operands N: Timer Number The timer number must be between 0000 to 4095 (decimal). S: Set Value The set value must be between #0000 and 9999 (BCD). Operand Specifications Area CIO Area CIO 0000 to CIO 6143...
Page 304 When the timer input is ON, TTIM(087)/TTIMX(555) increments the PV. When the timer input goes OFF, the timer will stop incrementing the PV, but the PV will retain its value. The PV will resume timing when the timer input goes ON again.
Page 305 0. Timer Completion Flag T0001 will be turned ON when the PV reaches the SV. If the reset input is turned ON, the timer PV will be reset to 0000 and the Com- pletion Flag (T0001) will be turned OFF. (Usually the reset input is turned ON...
Page 306: Long Timer: Timl(542)/Timlx(553
Section 3-6 Timer and Counter Instructions If the timer input is turned OFF before the SV is reached, the timer will stop timing but the PV will be maintained. The timer will resume from its previous PV when the timer input is turned ON again.
Page 307 D2+1 S: SV Word S+1 and S contain the 8-digit binary or BCD SV. (S and S+1 must be in the same data area.) The SV must be between #00000000 to #99999999 for TIML(542) and &00000000 to &4294967294 (decimal) or #00000000 to #FFFFFFFF (hexadecimal) for TIMLX(553).
Page 308 TIML(542)/TIMLX(553) is a decrementing ON-delay timer with units of 0.1-s that uses an 8-digit SV and an 8-digit PV. When the timer input is OFF, the timer is reset, i.e., the timer’s PV is reset to the SV and its Completion Flag is turned OFF.
Page 309: Multi-Output Timer: Mtim(543)/Mtimx(554
PV will begin counting down. The timer Completion Flag (CIO 020000) will be turned ON when the PV reaches 0000 0000. When CIO 000000 goes OFF, the timer PV will be reset to the SV and the Completion Flag will be turned OFF.
Page 310 Subroutines Interrupt tasks Not allowed Not allowed Operands D1: Completion Flags D1 contains the eight Completion Flags as well as the pause and reset bits. Do not use. Completion Flags Reset bit Pause bit D2: PV Word D2 contains the 4-digit binary or BCD PV.
Page 311 When the execution condition for MTIM(543)/MTIMX(554) is ON and the reset and timer bits are both OFF, MTIM(543)/MTIMX(554) increments the PV in D2. If the pause bit is turned ON, the timer will stop incrementing the PV, but the PV will retain its value. MTIM(543)/MTIMX(554) will resume timing when...
Page 312 PV, the corresponding Completion Flag (D1 bits 00 through 07) is turned ON. When the PV reaches 9999, the PV will be reset to 0000 and all of the Com- pletion Flags will be turned OFF. If the reset bit is turned ON while the timer is operating or paused, the PV will be reset to 0000 and all of the Completion Flags will be turned OFF.
Page 313 Section 3-6 Timer and Counter Instructions If in BCD mode and an SV in S through S+7 does not contain BCD data, that SV will be ignored. An error will not occur and the Error Flag will not be turned Since the Completion Flag for MTIM(543)/MTIMX(554) is in a data area it can be forced set or forced reset like other bits, but the PV will not change.
Page 314 Section 3-6 D1: 0100CH Completion Flags Reset bit Pause bit Timer PV (Incrementing) D2: D00100 Corresponding completion flag ON when SV ≤ PV. Timer SVs S: D00200 S+1: D00201 S+2: D00202 S+3: D00203 S+4: D00204 S+5: D00205 S+6: D00206 S+7: D00207...
Page 315: Counter: Cnt/Cntx(546)
Section 3-6 Timer and Counter Instructions 3-6-9 COUNTER: CNT/CNTX(546) Purpose CNT/CNTX(546) operates a decrementing counter. The setting range 0 to 9,999 for CNT and 0 to 65,535 for CNTX(546). Ladder Symbol Count input N: Counter number S: Set value Reset input...
Page 316 The counter is reset and the count input is ignored when the reset input is ON. (When a counter is reset, its PV is reset to the SV and the Completion Flag is turned OFF.) Count input...
Page 317 A counter’s PV is refreshed when the count input goes from OFF to ON and the Completion Flag is refreshed each time that CNT/CNTX(546) is executed. The Completion Flag is turned ON if the PV is 0 and it is turned OFF if the PV is not 0.
Page 318: Reversible Counter: Cntr(012)/Cntrx(548)
Counter PVs are retained even through a power interruption. If you want to restart counting from the SV instead of resuming the count from the retained PV, add the First Cycle Flag (A20011) as a reset input to the counter. First Cycle Flag...
Page 319 Decrement input Counter PV When incrementing, the Completion Flag will be turned ON when the PV is incremented from the SV back to 0 and it will be turned OFF again when the PV is incremented from 0 to 1.
Page 320 0 and both count inputs will be ignored. The Completion Flag will be ON only when the PV has been incremented from the SV to 0 or decremented from 0 to the SV; it will be OFF in all other cases.
Page 321 In the following example, the SV for CNTR(012) 0007 is determined by the content of CIO 0001. When the content of CIO 0001 is controlled by an exter- nal switch, the set value can be changed manually from the switch.
Page 322: Reset Timer/Counter: Cnr(545)/Cnrx(547)
Section 3-6 Timer and Counter Instructions 3-6-11 RESET TIMER/COUNTER: CNR(545)/CNRX(547) Purpose Resets the timers or counters within the specified range of timer or counter numbers. Ladder Symbol CNR(545) : First number in range : Last number in range Binary CNRX(547)
Page 323 . At the same time, the PVs will all be set to the maximum value (9999 for BCD and FFFF for binary). (The PV will be set to the SV the next time that the timer or counter instruction is executed.)
Page 324: Example Timer And Counter Applications
For example, when a TIM/TIMX(550) instruction is reset directly its PV is set to the SV, but when that timer is reset by CNR(545)/CNRX(547) its PV is set to the maximum value (9999 for BCD and FFFF for binary).
Page 325 In this example, a TIM instruction and a CNT instruction are combined to make a 500-second timer. TIM 0001 generates a pulse every 5 s and CNT 0002 counts these pulses. The set value for this combination is the timer interval counter SV.
Page 326 In this example two TIM timers are combined with KEEP(011) to make an ON delay and an OFF delay. CIO 000500 will be turned ON 5.0 seconds after ON/OFF Delay CIO 000000 goes ON and it will be turned OFF 3.0 seconds after CIO 000000 goes OFF.
Page 327 Two TIM timers can be combined to make a bit turn ON and OFF at regular intervals while the execution condition is ON. In this example, CIO 000205 will be OFF for 1.0 second and then ON for 1.5 seconds as long as CIO 000000 is...
Page 328: Indirect Addressing Of Timer/Counter Numbers
The timer or counter instruction will not be executed if the PLC memory address in the specified Index Register is not the address of a timer or counter Using Index Registers to indirectly address timers and counters can reduce the size of the program and increase flexibility.
Page 329 4. MOV(021) moves &100 into D00000 for indirect addressing of the timer SVs. 5. The content of IR0, IR1, IR2, and D00000 are incremented by 1 each time as this loop is executed 100 times, starting timers T0000 through T0099.
Page 330 Section 3-6 Timer and Counter Instructions The loop in the program above has 4 input parameters which are used to start all 100 timers with this common subroutine. The PLC memory address of the timer’s PV The PLC memory address of the timer’s Completion Flag The PLC memory address of the timer’s execution condition...
Page 331: Comparison Instructions
Purpose Input comparison instructions compare two values (constants and/or the con- tents of specified words) and create an ON execution condition when the comparison condition is true. Input comparison instructions are available to compare signed or unsigned data of one-word or double length data.
Page 332 DR0 to DR15 Index Registers Indirect addressing ,IR0 to ,IR15 using Index Registers –2048 to +2047 ,IR0 to –2048 to +2047 ,IR15 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15 Operand Specifications for Instructions for...
Page 333 Unlike instructions such as CMP(020) and CMPL(060), the result of an input comparison instruction is reflected directly as an execution condition, so it is not necessary to access the result of the comparison through an Arith- metic Flag and the program is simpler and faster.
Page 334 Section 3-7 Comparison Instructions comparison will be for one-word unsigned data. With the three input types and two options, there are 72 different input comparison instructions. Symbol Option (data format) Option (data length) (Equal) None: Unsigned data None: One-word data <...
Page 335 AND<=S AND SIGNED LESS THAN OR EQUAL OR<=S OR SIGNED LESS THAN OR EQUAL LD<=SL LOAD DOUBLE SIGNED LESS THAN OR EQUAL True if AND<=SL AND DOUBLE SIGNED LESS THAN OR EQUAL OR<=SL OR DOUBLE SIGNED LESS THAN OR EQUAL LD>...
Page 336 D00210 are compared as signed binary data. If the content of D00110 is less than that of D00210, CIO 005001 is turned ON and execution proceeds to the next line. If the content of D00110 is not less than that of D00210, the...
Page 337: Time Comparison Instructions (341 To 346)
Section 3-7 Comparison Instructions remainder of the instruction line is skipped and execution moves to the next instruction line. Signed : D00110 : D00210 LESS THAN 8714 3A1C Comparison Decimal: 30,956 Decimal: 14,876 30,956 < 14,876 (Will proceed to next line.)
Page 338 Operands C: Control Word Bits 00 to 05 of C specify whether or not the time data will be masked for the comparison. Bits 00 to 05 mask the seconds, minutes, hours, day, month, and year, respectively. If all 6 values are masked, the instruction will not be exe- cuted, the execution condition will be OFF, and the Error Flag will be turned Masks seconds data when ON.
Page 339 Month: 01 to 12 (BCD) Year: 00 to 99 (BCD) Note The year value indicates the last two digits of the year. Values 00 to 97 are interpreted as 2000 to 2097. Values 98 and 99 are interpreted as 1998 and 1999.
Page 340 Time values can be masked individually and excluded from the comparison operation. To mask a time value, set the corresponding bit in the control word (C) to 1. Bits 00 to 05 of C mask the seconds, minutes, hours, day, month, and year, respectively.
Page 341 Previous data comparison instructions compared data in 16-bit units. The time comparison instructions are limited to comparing 8-bit time values. The following table shows the structure of the CPU Unit’s internal Calendar/ Clock Area. Addresses Contents...
Page 342 Section 3-7 Comparison Instructions Flags Name Label Operation Error Flag ON if all 6 of the mask bits (C bits 00 to 05) are ON. OFF in all other cases. Greater Than > ON if S > S Flag OFF in all other cases.
Page 343: Compare: Cmp
Comparison Instructions 3-7-3 COMPARE: CMP(020) Purpose Compares two unsigned binary values (constants and/or the contents of specified words) and outputs the result to the Arithmetic Flags in the Auxiliary Area. Ladder Symbol CMP(020) : Comparison data 1 : Comparison data 2...
Page 344 Control the desired output or right-hand instruction with a branch from the same input condition that controls CMP(020), as shown in the following dia- gram. In this case, the Equals Flag and output A will be turned ON when S Correct Use of CMP(020)
Page 345 The immediate-refreshing variation (!CMP(020)) can be used with words allo- cated to external inputs specified in S and/or S . When !CMP(020) is exe- cuted, input refreshing will be performed for the external input word specified in S and/or S and that refreshed value will be compared. (Immediate refreshing cannot be performed on inputs allocated to Group-2 High-density I/O Units or Units mounted to Slave Racks.)
Page 346: Double Compare: Cmpl
Comparison Instructions 3-7-4 DOUBLE COMPARE: CMPL(060) Purpose Compares two double unsigned binary values (constants and/or the contents of specified words) and outputs the result to the Arithmetic Flags in the Auxil- iary Area. Ladder Symbol CMPL(060) : Comparison data 1...
Page 347 Do not program another instruction between CMPL(060) and the instruction controlled by the Arithmetic Flag because the other instruction might change the status of the Arithmetic Flag. In this case, the results of instruction B might change the results of CMPL(060).
Page 348 CIO 0011 and CIO 0010 is compared to the eight-digit unsigned binary data in CIO 0009 and CIO 0008 and the result is output to the Arithmetic Flags. The results recorded in the Greater Than, Equals, and Less Than Flags are immediately saved to CIO 000200 (Greater Than), CIO 000201 (Equals), and CIO 000202 (Less Than).
Page 349: Signed Binary Compare: Cps
3-7-5 SIGNED BINARY COMPARE: CPS(114) Purpose Compares two signed binary values (constants and/or the contents of speci- fied words) and outputs the result to the Arithmetic Flags in the Auxiliary Area. Ladder Symbol CPS(114) : Comparison data 1 : Comparison data 2...
Page 350 Control the desired output or right-hand instruction with a branch from the same input condition that controls CPS(114), as shown in the following dia- gram. In this case, the Equals Flag and output A will be turned ON when S Correct Use of CPS(114)
Page 351 Do not program another instruction between CPS(114) and the instruction controlled by the Arithmetic Flag because the other instruction might change the status of the Arithmetic Flag. In this case, the results of instruction B might change the results of CPS(114).
Page 352: Double Signed Binary Compare: Cpsl
Comparison Instructions 3-7-6 DOUBLE SIGNED BINARY COMPARE: CPSL(115) Purpose Compares two double signed binary values (constants and/or the contents of specified words) and outputs the result to the Arithmetic Flags in the Auxiliary Area. Ladder Symbol CPSL(115) : Comparison data 1...
Page 353 CPSL(115) compares the double signed binary data in S +1, S and S and outputs the result to Arithmetic Flags (the Greater Than, Greater Than or Equal, Equal, Less Than or Equal, Less Than, and Not Equal Flags) in the Auxiliary Area. Signed binary comparison...
Page 354 D00006 and D00005 and the result is output to the Arithmetic Flags. • If the content of D00002 and D00001 is greater than that of D00006 and D00005, the Greater Than Flag will be turned ON, causing CIO 002000 to be turned ON.
Page 355: Multiple Compare: Mcmp
R: Result word Each bit of R contains the result of a comparison between two words in the 16-word sets. Bit n of R (n = 00 to 15) contains the result of the comparison between words S +n and S...
Page 356 +n is equal to the content of S +n; bit n of R is turned ON if the contents are not equal. If the contents of all 16 pairs of words are the same, the Equals Flag will turn ON after the instruction has been executed.
Page 357 3-7-8 TABLE COMPARE: TCMP(085) Purpose Compares the source data to the contents of 16 consecutive words and turns ON the corresponding bit in the result word when the contents of the words are equal. Ladder Symbol TCMP(085) S: Source data...
Page 358 R: Result word Each bit of R contains the result of a comparison between S and a word in the 16-word table. Bit n of R (n = 00 to 15) contains the result of the comparison between S and T+n.
Page 359 T+15 and turns ON the corresponding bit in word R when the data are equal. Bit n of R is turned ON if the content of T+n is equal to S and it is turned OFF if they are not equal.
Page 360: Block Compare: Bcmp
B+31 must be in the same data area. R: Result word Each bit of R contains the result of a comparison between S and one of the 16 ranges defined the 32-word block. Bit n of R (n = 00 to 15) contains the result of the comparison between S and the n pair of words.
Page 361 (B+2n) provides the lower limit and the second word (B+2n+1) provides the upper limit of range n (n = 0 to 15). If S is within any of these ranges (inclusive of the upper and lower limits), the corresponding bit in R is turned ON. The rest of the bits in R will be turned OFF.
Page 362: Expanded Block Compare: Bcmp2(502)
(S is not within any of the 16 ranges.) OFF in all other cases. Precautions An error will not occur if the lower limit is greater than the upper limit, but 0 (not within the range) will be output to the corresponding bit of R. Example...
Page 363 Range N value B R: First result word Each bit of each R word contains the result of a comparison between S and one of the ranges defined the comparison block. The maximum number of result words is 16, i.e., m equals 0 to 15.
Page 364 If S is within any of these ranges (inclusive of the upper and lower limits), the corresponding bits in the result words (R to R+15 max.) are turned ON. The rest of the bits in R will be turned OFF.
Page 365 D00201 and D00202, then bit 00 of CIO 0100 is turned ON and if it in not in the range, then bit 00 of CIO 0100 is turned OFF. Likewise, the source data in CIO 0010 is compared to the ranges defined by...
Page 366: Area Range Compare: Zcp(088)
Section 3-7 Comparison Instructions parison block, and bit 1 in CIO 0100, bit 7 in CIO 1010, and the other bits in the result words are manipulated according to the results of comparison. 000000 0 0 1 7 R: CIO 0100...
Page 367 ZCP(088) compares the 16-bit signed binary data in CD with the range defined by LL and UL and outputs the result to the Greater Than, Equals, and Less Than Flags in the Auxiliary Area. (The Less Than or Equal, Greater Than or Equal, and Not Equal Flags are left unchanged.)
Page 368 Example When CIO 000000 is ON in the following example, the 16-bit unsigned binary data in D00000 is compared to the range 0005 to 001F hex (5 to 31 decimal) and the result is output to the Arithmetic Flags. CIO 000200 is turned ON if 0005 hex content of D00000 001F hex.
Page 369: Double Area Range Compare: Zcpl(116)
Purpose Compares a 32-bit unsigned binary value (CD+1, CD) with the range defined by lower limit (LL+1, LL) and upper limit (UL+1, UL). The results are output to the Arithmetic Flags. This instruction is supported by CS1-H, CJ1-H, CJ1M, and CS1D CPU Units only.
Page 370 ZCPL(116) compares the 32-bit signed binary data in CD+1, CD with the range defined by LL+1, LL and UL+1, UL and outputs the result to the Greater Than, Equals, and Less Than Flags in the Auxiliary Area. (The Less Than or Equal, Greater Than or Equal, and Not Equal Flags are left unchanged.)
Page 371: Data Movement Instructions
Left unchanged. Negative Flag Left unchanged. Precautions Do not program another instruction between ZCPL(116) and an input condi- tion that accesses the result of ZCPL(116) because the other instruction might change the status of the Arithmetic Flags. Data Movement Instructions...
Page 372 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –) IR0 to, –(– –) IR15 Description Transfers S to D. If S is a constant, the value can be used for a data setting. Source word Bit status not Destination word changed.
Page 373: Move Not: Mvn
(Decimal 1234) 00003 -1234 D00012 D00012 (Decimal -1234) 3-8-2 MOVE NOT: MVN(022) Purpose Transfers the complement of a word of data to the specified word. Ladder Symbol MVN(022) S: Source D: Destination Variations Variations Executed Each Cycle for ON Condition MVN(022)
Page 374: Double Move: Movl
DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –) IR0 to, –(– –) IR15 Description MVN(022) inverts the bits in S and transfers the result to D. The content of S is left unchanged. Source word Destination word Bit status inverted.
Page 375 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –) IR0 to, 1–(– –) IR5 Description MOVL(498) transfers S+1 and S to D+1 and D. If S+1 and S are constants, the value can be used for a data setting. Bit status not changed.
Page 376: Double Move Not: Mvnl
Section 3-8 Data Movement Instructions Example When CIO 000000 is ON in the following example, the content of D00101 and D00100 are copied to D00201 and D00200. 3-8-4 DOUBLE MOVE NOT: MVNL(499) Purpose Transfers the complement of two words of data to the specified words.
Page 377: Move Bit: Movb
DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –) IR0 to, –(– –) IR15 Description MVNL(499) inverts the bits in S+1 and S and transfers the result to D+1 and D. The contents of S+1 and S are left unchanged. Bit status inverted.
Page 378 Operands C: Control Word The rightmost two digits of C indicate which bit of S is the source bit and the leftmost two digits of C indicate which bit of D is the destination bit. Source bit: 00 to 0F...
Page 379: Move Digit: Movd
MOVB(082) copies the specified bit (n) from S to the specified bit (m) in D. The other bits in the destination word are left unchanged. Note The same word can be specified for both S and D to copy a bit within a word. Flags...
Page 380 Digit 1 Digit 0 C: Control Word The first three digits of C indicate the first source digit (m), the number of dig- its to transfer (n), and the first destination digit (l), as shown in the following diagram. First digit in S (m): 0 to 3...
Page 381 If the number of digits being read or written exceeds the leftmost digit of S or D, MOVD(083) will wrap to the rightmost digit of the same word. Note The same word can be specified for both S and D to copy a bit within a word. Flags...
Page 382: Multiple Bit Transfer: Xfrb
C: Control Word The first three digits of C indicate the first destination bit (m), the number of bits to transfer (n), and the first source digit (l), as shown in the following dia- gram. First bit in S (l l ): 0 to F...
Page 383 XFRB(062) transfers up to 255 consecutive bits from the source words (begin- ning with bit l of S) to the destination words (beginning with bit m of D). Bits in the destination words that are not overwritten by the source bits are left unchanged.
Page 384: Block Transfer: Xfer
Error Flag Precautions Up to 255 bits of data can be transferred per execution of XFRB(062). Be sure that the source words and destination words do not exceed the end of the data area. Examples When CIO 000000 is ON in the following example, the 20 bits beginning with CIO 020006 are copied to the 20 bits beginning with CIO 030000.
Page 385 Subroutines Interrupt tasks Operands N: Number of Words Specifies the number of words to be transferred. The possible range for N is 0000 to FFFF (0 to 65,535 decimal). S: First Source Word Specifies the first source word. S+(N 1) D: First Destination Word Specifies the first destination word.
Page 386 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –) IR0 to, –(– –) IR15 Description XFER(070) copies N words beginning with S (S to S+(N–1)) to the N words beginning with D (D to D+(N–1)). N words S+(N−1) (N−1)
Page 387: Block Set: Bset
Subroutines Interrupt tasks Operands S: Source Word Specifies the source data or the word containing the source data. St: Starting Word Specifies the first word in the destination range. E: End Word Specifies the last word in the destination range.
Page 388 ON if St is greater than E. OFF in all other cases. Precautions Be sure that the starting word (St) and end word (E) are in the same data area and that St Some time will be required to complete BSET(071) when the source data is being transferred to a large number of words.
Page 389: Data Exchange: Xchg(073)
Section 3-8 Data Movement Instructions 3-8-10 DATA EXCHANGE: XCHG(073) Purpose Exchanges the contents of the two specified words. Ladder Symbol XCHG(073) E1: First exchange word E2: Second exchange word Variations Variations Executed Each Cycle for ON Condition XCHG(073) Executed Once for Upward Differentiation...
Page 390: Double Data Exchange: Xcgl(562)
Flags are left unchanged. In CS1 and CJ1 CPU Units, these Flags are turned OFF. Example When CIO 000000 is ON in the following example, the content of D00100 is exchanged with the content of D00200. 3-8-11 DOUBLE DATA EXCHANGE: XCGL(562)
Page 391 XCHG(073) exchanges the contents of E1+1 and E1 with the contents of E2+1 and E2. E1+1 E2+1 To exchange 3 or more words, use XFER(070) to transfer the words to a third set of words (a buffer) as shown in the following diagram.
Page 392: Single Word Distribute: Dist(080)
In CS1 and CJ1 CPU Units, these Flags are turned OFF. Example When CIO 000000 is ON in the following example, the contents of D00100 and D00101 are exchanged with the contents of D00200 and D00201. 3-8-12 SINGLE WORD DISTRIBUTE: DIST(080)
Page 393 Of: Offset This value is added to the base address to calculate the destination word. The offset can be any value from 0000 to FFFF (0 to 65,535 decimal), but Bs and Bs+Of must be in the same data area.
Page 394: Data Collect: Coll(081)
ON if the leftmost bit of the source data is 1. OFF in all other cases. Precautions Be sure that the offset does not exceed the end of the data area, i.e., Bs and Bs+Of are in the same data area. Example...
Page 395 Of: Offset This value is added to the base address to calculate the source word. The off- set can be any value from 0000 to FFFF (0 to 65,535 decimal), but Bs and Bs+Of must be in the same data area.
Page 396: Move To Register: Movr(560)
ON if the leftmost bit of the source data is 1. OFF in all other cases. Precautions Be sure that the offset does not exceed the end of the data area, i.e., Bs and Bs+Of are in the same data area. Example...
Page 397 Internal I/O memory address of S Index Register If a timer or counter is specified in S, MOVR(560) will write the PLC memory address of the timer/counter Completion Flag in D. Use MOVRW(561) to write the PLC memory address of the timer/counter PV in D.
Page 398: Move Timer/Counter Pv To Register: Movrw(561)
Be sure to set a register using MOVR(560) in an interrupt task before using the register. Any changes to the contents of an IR or DR made in an interrupt task will not affect the contents of the register in a cyclic task.
Page 399 Internal I/O memory address of S Timer/counter PV only Index Register MOVRW(561) will set the PLC memory address of the timer or counter’s PV in D. Use MOVR(560) to set the PLC memory address of the timer or counter Completion Flag.
Page 400: Data Shift Instructions
Section 3-9 Data Shift Instructions Example When CIO 000000 is ON in the following example, MOVRW(561) writes the PLC memory address for the PV of timer T0000 to IR1. Internal I/O memory address Data Shift Instructions This section describes instructions used to shift data within or between words, but in differing amounts and directions.
Page 401: Shift Register: Sft
Applicable Program Areas Block program areas Step program areas Subroutines Interrupt tasks Not allowed Note St and E must be in the same data area. Operand Specifications Area CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511...
Page 402: Reversible Shift Register: Sftr
When the execution condition on the shift input changes from OFF to ON, all the data from St to E is shifted to the left by one bit (from the rightmost bit to the leftmost bit), and the ON/OFF status of the data input is placed in the rightmost bit.
Page 403 15 14 13 12 Shift direction 1 (ON): Left 0 (OFF): Right Data input Shift input Reset Note St and E must be in the same data area. Operand Specifications Area CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511...
Page 404 St to E is moved in the designated shift direction (designated by bit 12 of C) by 1 bit, and the ON/OFF status of the data input is placed in the rightmost or leftmost bit. The bit data shifted out of the shift register is placed in the Carry Flag (CY).
Page 405: Asynchronous Shift Register: Asft
Controlling Data Resetting Data All bits from St to E and the Carry Flag are set to 0 and no other data can be received when the reset input bit (bit 15 of C) is ON. Shifting Data Left (from Rightmost to Leftmost Bit)
Page 406 ,–(– –)IR0 to, –(– –)IR15 Description When the Shift Enable Bit (bit 14 of C) is ON, all of the words with non-zero content within the range of words between St and E will be shifted one word in the direction determined by the Shift Direction Bit (bit 13 of C) whenever the word in the shift direction contains all zeros.
Page 407 OFF in all other cases. Precautions When the Clear Flag (bit 15 of C) goes ON, all bits in the shift register, from St to E, will be reset (i.e., set to 0). The Clear Flag has priority over the Shift Enable Bit (bit 14 of C).
Page 408: Word Shift: Wsft
Not supported Applicable Program Areas Block program areas Step program areas Subroutines Interrupt tasks Note St and E must be in the same data area. Operand Specifications Area CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511...
Page 409 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15 Description WSFT(016) shifts data from St to E in word units and the data from the source word S is places into St. The contents of E is lost. Lost Flags...
Page 410: Arithmetic Shift Left: Asl
Description ASL(025) shifts the contents of Wd one bit to the left (from rightmost bit to left- most bit). “0” is placed in the rightmost bit and the data from the leftmost bit is shifted into the Carry Flag (CY).
Page 411: Double Shift Left: Asll
If as a result of the shift the contents of Wd is zero, the Equals Flag will turn If as a result of the shift the contents of the leftmost bit of Wd is 1, the Nega- tive Flag will turn ON.
Page 412 If as a result of the shift the contents of Wd and Wd +1 are zero, the Equals Flag will turn ON. If as a result of the shift the contents of the leftmost bit of Wd +1 is 1, the Neg- ative Flag will turn ON.
Page 413: Arithmetic Shift Right: Asr
Section 3-9 Data Shift Instructions 3-9-7 ARITHMETIC SHIFT RIGHT: ASR(026) Purpose Shifts the contents of Wd one bit to the right. Ladder Symbol ASR(026) Wd: Word Variations Variations Executed Each Cycle for ON Condition ASR(026) Executed Once for Upward Differentiation...
Page 414: Double Shift Right: Asrl
When ASR(026) is executed, the Error Flag and the Negative Flag will turn OFF. If as a result of the shift the contents of Wd is zero, the Equals Flag will turn Examples When CIO 000000 is ON, word CIO 0100 will shift one bit to the right. “0” will be placed in CIO 010015 and the contents of CIO 010000 will be shifted to the Carry Flag (CY).
Page 415 ASRL(571) shifts the contents of Wd and Wd +1 one bit to the right (from left- most bit to rightmost bit). “0” will be placed in the leftmost bit of Wd +1 and the contents of the rightmost bit of Wd will be shifted into the Carry Flag (CY).
Page 416: Rotate Left: Rol
Precautions When ASRL (571) is executed, the Error Flag and the Negative Flag will turn OFF. If as a result of the shift the contents of Wd and Wd +1 are zero, the Equals Flag will turn ON. Examples When CIO 000000 is ON, word CIO 0100 and CIO 0101 will shift one bit to the right.
Page 417 If as a result of the shift the contents of Wd is zero, the Equals Flag will turn If as a result of the shift the contents of the leftmost bit of Wd is 1, the Nega- tive Flag will turn ON.
Page 418: Double Rotate Left: Roll(572)
Section 3-9 Data Shift Instructions CIO 0100 Instruction executed once 3-9-10 DOUBLE ROTATE LEFT: ROLL(572) Purpose Shifts all Wd and Wd +1 bits one bit to the left including the Carry Flag (CY). Ladder Symbol ROLL(572) Wd: Word Variations Variations...
Page 419 If as a result of the shift the contents of Wd and Wd +1 are zero, the Equals Flag will turn ON. If as a result of the shift the contents of the leftmost bit of Wd + 1 is 1, the Neg- ative Flag will turn ON.
Page 420: Rotate Right: Ror(028)
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15 Description ROR(028) shifts all bits of Wd including the Carry Flag (CY) to the right (from leftmost bit to rightmost bit).
Page 421: Double Rotate Right: Rorl(573)
If as a result of the shift the contents of Wd is zero, the Equals Flag will turn If as a result of the shift the contents of the leftmost bit of Wd is 1, the Nega- tive Flag will turn ON.
Page 422 ON when the leftmost bit is 1 as a result of the shift. OFF in all other cases. Precautions When RORL(573) is executed, the Error Flag will turn OFF. If as a result of the shift the contents of Wd and Wd +1 are zero, the Equals Flag will turn ON.
Page 423: Rotate Left Without Carry: Rlnc(574)
Section 3-9 Data Shift Instructions If as a result of the shift the contents of the leftmost bit of Wd + 1 is 1, the Neg- ative Flag will turn ON. Note It is possible to set the Carry Flag contents to 1 or 0 immediately before exe- cuting this instruction, by using the Set Carry (STC(040)) or Clear Carry (CLC(041)) instructions.
Page 424 If as a result of the shift the contents of Wd is zero, the Equals Flag will turn If as a result of the shift the contents of the leftmost bit of Wd is 1, the Nega- tive Flag will turn ON.
Page 425: Double Rotate Left Without Carry: Rlnl(576)
Data Shift Instructions Wd: CIO 0100 Instruction executed once 3-9-14 DOUBLE ROTATE LEFT WITHOUT CARRY: RLNL(576) Purpose Shifts all Wd and Wd +1 bits one bit to the left not including the Carry Flag (CY). Ladder Symbol RLNL(576) Wd: Word...
Page 426 If as a result of the shift the contents of Wd and Wd +1 are zero, the Equals Flag will turn ON. If as a result of the shift the contents of the leftmost bit of Wd + 1 is 1, the Neg- ative Flag will turn ON.
Page 427: Rotate Right Without Carry: Rrnc(575)
3-9-15 ROTATE RIGHT WITHOUT CARRY: RRNC(575) Purpose Shifts all Wd bits one bit to the right not including the Carry Flag (CY). The contents of the rightmost bit of Wd shifts to the leftmost bit and to the Carry Flag (CY).
Page 428: Double Rotate Right Without Carry: Rrnl(577)
If as a result of the shift the contents of Wd is zero, the Equals Flag will turn If as a result of the shift the contents of the leftmost bit of Wd is 1, the Nega- tive Flag will turn ON.
Page 429 ON when the leftmost bit is 1 as a result of the shift. OFF in all other cases. Precautions When RRNL(577) is executed, the Error Flag will turn OFF. If as a result of the shift the contents of Wd and Wd +1 are zero, the Equals Flag will turn ON.
Page 430: One Digit Shift Left: Sld(074)
Section 3-9 Data Shift Instructions If as a result of the shift the contents of the leftmost bit of Wd + 1 is 1, the Neg- ative Flag will turn ON. Note It is possible to set the Carry Flag contents to 1 or 0 immediately before exe- cuting this instruction, by using the Set Carry (STC(040)) or Clear Carry (CLC(041)) instructions.
Page 431 When CIO 000000 is ON, words CIO 0100 through CIO 0102 will shift by one digit (4 bits) to the left. A zero will be placed in bits 0 to 3 of word CIO 0100 and the contents of bits 12 to 15 of CIO 0102 will be lost.
Page 432: One Digit Shift Right: Srd(075)
Not supported Applicable Program Areas Block program areas Step program areas Subroutines Interrupt tasks Note St and E must be in the same data area. Operand Specifications Area CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511...
Page 433: Shift N-Bit Data Left: Nsfl(578)
When CIO 000000 is ON, words CIO 0100 through CIO 0102 will shift by one digit (4 bits) to the right. A zero will be placed in bits 12 to 15 of CIO 0102 and the contents of bits 0 to 3 of word CIO 0100 will be lost.
Page 434 (C) in the rightmost word, as designated by D one bit to the left (towards the leftmost word and the leftmost bit). “0” is place into the begin- ning bit and the contents of the leftmost bit in the shift area are shifted to the Carry Flag (CY).
Page 435: Shift N-Bit Data Right: Nsfr(579)
When CIO 000000 is ON, all bits from the beginning bit 3 to the shift data length (B hex) will be shifted one bit to the left (from the rightmost bit to the leftmost bit). “0” will be placed into bit 3 of CIO 0100. The contents of the left- most bit in the shift area (bit 13 of CIO 0100) are copied into the Carry Flag (CY).
Page 436 NSFR(579) shifts the specified number of bits by the shift data length (N) from the beginning bit (C) in the rightmost word as designated by D one bit to the right (towards the rightmost word and the rightmost bit). “0” will be placed into the beginning bit and the contents of the rightmost bit in the shift area will be shifted to the Carry Flag (CY).
Page 437: Shift N-Bits Left: Nasl(580)
Examples When CIO 000000 is ON, all bits from the beginning bit 2 to end of the shift data length 11 bits (B hex), will be shifted one bit to the right, (from the left- most bit to the rightmost bit). “0” is shifted into bit 12 of CIO 0100. The con- tents of the rightmost bit in the shift area (bit 2 of CIO 0100) are copied into the Carry Flag (CY).
Page 438 NASL(580) shifts D (the shift word) by the specified number of binary bits (specified in C) to the left (from the rightmost bit to the leftmost bit). Either zeros or the value of the rightmost bit will be placed into the specified number...
Page 439 If as a result of the shift the contents of D is 0000 hex, the Equals Flag will turn ON. If as a result of the shift the contents of the leftmost bit of D is 1, the Negative Flag will turn ON.
Page 440: Double Shift N-Bits Left: Nsll(582)
No. of bits to shift: 10 bits (Contents of the rightmost bit is inserted.) 3-9-22 DOUBLE SHIFT N-BITS LEFT: NSLL(582) Purpose Shifts the specified 32 bits of word data to the left by the specified number of bits. Ladder Symbol NSLL(582) D: Shift word...
Page 441 NSLL(582) shifts D and D+1 (the shift words) by the specified number of binary bits (specified in C) to the left (from the rightmost bit to the leftmost bit). Either zeros or the value of the rightmost bit will be placed into the specified number of bits of the shift word starting from the rightmost bit.
Page 442 If as a result of the shift the contents of D is 0000, the Equals Flag will turn If as a result of the shift the contents of the leftmost bit of D, D +1 is 1, the Negative Flag will turn ON.
Page 443: Shift N-Bits Right: Nasr(581)
No. of bits to shift: 10 bits (Contents of the rightmost bit is shifted in) 3-9-23 SHIFT N-BITS RIGHT: NASR(581) Purpose Shifts the specified 16 bits of word data to the right by the specified number of bits. Ladder Symbol NASR(581) D: Shift word...
Page 444 Carry Flag (CY), and all other data is discarded. When the number of bits to shift (specified in C) is “0,” the data will not be shifted. The appropriate flags will turn ON and OFF, however, according to...
Page 445: Double Shift N-Bits Right: Nsrl(583)
If as a result of the shift the contents of D is 0000 hex, the Equals Flag will turn ON. If as a result of the shift the contents of the leftmost bit of D is 1, the Negative Flag will turn ON.
Page 446 (specified in C) to the right (from the leftmost bit to the rightmost bit). Either zeros or the value of the rightmost bit will be placed into the speci- fied number of bits of the shift word starting from the rightmost bit.
Page 447 If as a result of the shift the contents of D +1 is 00000000 hex, the Equals Flag will turn ON. If as a result of the shift the contents of the leftmost bit of D +1 is 1, the Nega- tive Flag will turn ON.
Page 448 Section 3-9 Data Shift Instructions Lost Leftmost bit No. of bits to shift: 10 bits (Contents of the leftmost bit is inserted.)
Page 449: Increment/Decrement Instructions
,–(– –)IR0 to, –(– –)IR15 Description The ++(590) instruction adds 1 to the binary content of Wd. The specified word will be incremented by 1 every cycle as long as the execution condition of ++(590) is ON. When the up-differentiated variation of this instruction...
Page 450 OFF to ON. The Equals Flag will be turned ON if the result is 0000, the Carry Flag will be turned ON when a digit changes from F to 0, and the Negative Flag will be turned ON when bit 15 of Wd is ON in the result.
Page 451: Double Increment Binary: ++L(591)
The ++L(591) instruction adds 1 to the 8-digit hexadecimal content of Wd+1 and Wd. The content of the specified words will be incremented by 1 every cycle as long as the execution condition of ++L(591) is ON. When the up-dif-...
Page 452 The Equals Flag will be turned ON if the result is 0000 0000, the Carry Flag will be turned ON when a digit changes from F to 0, and the Negative Flag will be turned ON if bit 15 of Wd+1 is ON in the result.
Page 453: Decrement Binary: - -(592)
The – –(592) instruction subtracts 1 from the binary content of Wd. The spec- ified word will be decremented by 1 every cycle as long as the execution con- dition of – –(592) is ON. When the up-differentiated variation of this instruction (@–...
Page 454 Increment/Decrement Instructions Section 3-10 The Equals Flag will be turned ON if the result is 0000, the Carry Flag will be turned ON when a digit changes from 0 to F, and the Negative Flag will be turned ON if bit 15 of Wd is ON in the result.
Page 455: Double Decrement Binary: - -L(593)
Wd+1 and Wd. The content of the specified words will be decremented by 1 every cycle as long as the execution condition of – –L(593) is ON. When the up-differentiated variation of this instruction (@– –L(593)) is used, the content...
Page 456 The Equals Flag will be turned ON if the result is 0000 0000, the Carry Flag will be turned ON when a digit changes from 0 to F, and the Negative Flag will be turned ON if bit 15 of Wd+1 is ON in the result.
Page 457: Increment Bcd: ++B(594)
Description The ++B(594) instruction adds 1 to the BCD content of Wd. The specified word will be incremented by 1 every cycle as long as the execution condition of ++B(594) is ON. When the up-differentiated variation of this instruction (@++B(594)) is used, the specified word is incremented only when the execu-...
Page 458 ON if a digit in Wd went from 9 to 0 during execution. OFF in all other cases. Precautions The content of Wd must be BCD. If it is not BCD, an error will occur and the Error Flag will be turned ON. Examples...
Page 459: Double Increment Bcd: ++Bl(595)
The ++BL(595) instruction adds 1 to the 8-digit BCD content of Wd+1 and Wd. The content of the specified words will be incremented by 1 every cycle as long as the execution condition of ++BL(595) is ON. When the up-differen-...
Page 460 ON if a digit in Wd+1 or Wd went from 9 to 0 during exe- cution. OFF in all other cases. Precautions The content of Wd+1 and Wd must be BCD. If it is not BCD, an error will occur and the Error Flag will be turned ON. Examples Operation of ++BL(595) In the following example, the 8-digit BCD content of D00101 and D00100 will be incremented by 1 every cycle as long as CIO 000000 is ON.
Page 461: Decrement Bcd: - -B(596)
The – –B(596) instruction subtracts 1 from the BCD content of Wd. The spec- ified word will be decremented by 1 every cycle as long as the execution con- dition of – –B(596) is ON. When the up-differentiated variation of this instruction (@–...
Page 462 ON if a digit in Wd went from 0 to 9 during execution. OFF in all other cases. Precautions The content of Wd must be BCD. If it is not BCD, an error will occur and the Error Flag will be turned ON. Examples Operation of –...
Page 463: Double Decrement Bcd: - -Bl(597)
Wd. The content of the specified words will be decremented by 1 every cycle as long as the execution condition of – –BL(597) is ON. When the up- differentiated variation of this instruction (@– –BL(597)) is used, the content...
Page 464 ON if a digit in Wd+1 or Wd went from 0 to 9 during exe- cution. OFF in all other cases. Precautions The content of Wd+1 and Wd must be BCD. If it is not BCD, an error will occur and the Error Flag will be turned ON. Examples Operation of – –BL(597) In the following example, the 8-digit BCD content of D00101 and D00100 will be decremented by 1 every cycle as long as CIO 000000 is ON.
Page 465: Symbol Math Instructions
Section 3-11 Symbol Math Instructions 3-11 Symbol Math Instructions This section describes the Symbol Math Instructions, which perform arith- metic operations on BCD or binary data. Instruction Mnemonic Function code Page SIGNED BINARY ADD WITH- OUT CARRY DOUBLE SIGNED BINARY...
Page 466: Signed Binary Add Without Carry: +(400)
#0000 to #FFFF (binary) Data Registers DR0 to DR15 Index Registers Indirect addressing ,IR0 to ,IR15 using Index Registers –2048 to +2047 ,IR0 to –2048 to +2047 ,IR15 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15...
Page 467 If the result of adding two negative numbers is positive (in the range 0000 to 7FFF hex), the Underflow Flag will turn ON. If as a result of the addition, the content of the leftmost bit of R is 1, the Nega- tive Flag will turn ON.
Page 468: Double Signed Binary Add Without Carry: +L(401)
#00000000 to #FFFFFFFF (binary) Data Registers Index Registers IR0 to IR15 Indirect addressing ,IR0 to ,IR15 using Index Registers –2048 to +2047 ,IR0 to –2048 to +2047 ,IR15 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15...
Page 469 If the result of adding two negative numbers is positive (in the range 00000000 to 7FFFFFFF hex), the Underflow Flag will turn ON. If as a result of the addition, the content of the leftmost bit of R+1 is 1, the Negative Flag will turn ON.
Page 470: Signed Binary Add With Carry: +C(402)
Section 3-11 Symbol Math Instructions 3-11-3 SIGNED BINARY ADD WITH CARRY: +C(402) Purpose Adds 4-digit (single-word) hexadecimal data and/or constants with the Carry Flag (CY). Ladder Symbol +C(402) Au: Augend word Ad: Addend word R: Result word Variations Variations Executed Each Cycle for ON Condition...
Page 471 If the result of adding two negative numbers and CY is positive (in the range 0000 to 7FFF hex), the Underflow Flag will turn ON. If as a result of the addition, the content of the leftmost bit of R is 1, the Nega- tive Flag will turn ON.
Page 472: Double Signed Binary Add With Carry: +Cl(403)
Section 3-11 Symbol Math Instructions 3-11-4 DOUBLE SIGNED BINARY ADD WITH CARRY: +CL(403) Purpose Adds 8-digit (double-word) hexadecimal data and/or constants with the Carry Flag (CY). Ladder Symbol +CL(403) Au: 1st augend word Ad: 1st addend word R: 1st result word...
Page 473 If the result of adding two negative numbers and CY is positive (in the range 00000000 to 7FFFFFFF hex), the Underflow Flag will turn ON. If as a result of the addition, the content of the leftmost bit of R+1 is 1, the Negative Flag will turn ON.
Page 474: Bcd Add Without Carry: +B(404)
0000 to 9999 (BCD) Data Registers DR0 to DR15 Index Registers Indirect addressing ,IR0 to ,IR15 using Index Registers –2048 to +2047 ,IR0 to –2048 to +2047 ,IR15 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15...
Page 475: Double Bcd Add Without Carry: +Bl(405)
OFF in all other cases. Precautions If Au or Ad is not BCD, an error is generated and the Error Flag will turn ON. If as a result of the addition, the content of R is 0000 hex, the Equals Flag will turn ON.
Page 476 –2048 to +2047 ,IR0 to –2048 to +2047 ,IR15 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15 Description +BL(405) adds the BCD values in Au and Au+1 and Ad and Ad+1 and outputs the result to R, R+1. (BCD) Au +1 (BCD)
Page 477: Bcd Add With Carry: +Bc(406)
Symbol Math Instructions Precautions If Au, Au +1 or Ad, Ad +1 are not BCD, an error is generated and the Error Flag will turn ON. If as a result of the addition, the content of R, R +1 is 00000000 hex, the Equals Flag will turn ON.
Page 478 OFF in all other cases. Precautions If Au or Ad is not BCD, an error is generated and the Error Flag will turn ON. If as a result of the addition, the content of R is 0000 hex, the Equals Flag will turn ON.
Page 479: Double Bcd Add With Carry: +Bcl(407)
Section 3-11 Symbol Math Instructions 3-11-8 DOUBLE BCD ADD WITH CARRY: +BCL(407) Purpose Adds 8-digit (double-word) BCD data and/or constants with the Carry Flag (CY). Ladder Symbol +BCL(407) Au: 1st augend word Ad: 1st addend word R: 1st result word...
Page 480: Signed Binary Subtract Without Carry: -(410)
OFF in all other cases. Precautions If Au, Au +1 or Ad, Ad +1 are not BCD, an error is generated and the Error Flag will turn ON. If as a result of the addition, the content of R, R +1 is 00000000 hex, the Equals Flag will turn ON.
Page 481 –(400) subtracts the binary values in Su from Mi and outputs the result to R. When the result is negative, it is output to R as a 2’s complement. (Refer to 3- 11-10 DOUBLE SIGNED BINARY SUBTRACT WITHOUT CARRY: –L(411) for an example of handling 2’s complements.)
Page 482: Double Signed Binary Subtract Without Carry: -L(411)
If the result of subtracting a positive number from a negative number is posi- tive (in the range 0000 to 7FFF hex), the Underflow Flag will turn ON. If as a result of the subtraction, the content of the leftmost bit of R is 1, the Negative Flag will turn ON.
Page 483 ,–(– –)IR0 to, –(– –)IR15 Description –L(411) subtracts the binary values in Su and Su+1 from Mi and Mi+1 and outputs the result to R, R+1. When the result is negative, it is output to R and R+1 as a 2’s complement. (Signed binary)
Page 484 If the result of subtracting a positive number from a negative number is posi- tive (in the range 00000000 to 7FFFFFFF hex), the Underflow Flag will turn If as a result of the subtraction, the content of the leftmost bit of R+1 is 1, the Negative Flag will turn ON.
Page 485 In this example, the eight-digit binary value in CIO 0121 and CIO 0120 is sub- tracted from the value in CIO 0201 and CIO 0200, and the result is output in eight-digit binary to D00101 and D00100. If the result is negative, the instruc- tion at (2) will be executed, and the actual result will then be output to D00101 and D00100.
Page 486: Signed Binary Subtract With Carry: -C(412)
R+1: D00100 The Carry Flag (CY) is turned ON, so the actual number is –97AE06D3. Because the content of D00101 and D00100 is negative, CY is used to turn ON CIO 002100 to indicate this. 3-11-11 SIGNED BINARY SUBTRACT WITH CARRY: –C(412)
Page 487 ,–(– –)IR0 to, –(– –)IR15 Description –C(412) subtracts the binary values in Su and CY from Mi, and outputs the result to R. When the result is negative, it is output to R as a 2’s complement. (Signed binary) (Signed binary) –...
Page 488: Double Signed Binary Subtract With Carry: -Cl(413)
If the result of subtracting a positive number and CY from a negative number is positive (in the range 0000 to 7FFF hex), the Underflow Flag will turn ON. If as a result of the subtraction, the content of the leftmost bit of R is 1, the Negative Flag will turn ON.
Page 489 ,–(– –)IR0 to, –(– –)IR15 Description –CL(413) subtracts the binary values in Su and Su+1 and CY from Mi and Mi+1, and outputs the result to R, R+1. When the result is negative, it is output to R, R+1 as a 2’s complement. Mi+1...
Page 490 (in the range 00000000 to 7FFFFFFF hex), the Underflow Flag will turn ON. If as a result of the subtraction, the content of the leftmost bit of R+1 is 1, the Negative Flag will turn ON. Note To clear the Carry Flag (CY), execute the Clear Carry (CLC(041)) instruction.
Page 491: Bcd Subtract Without Carry: -B(414)
0000 to 9999 (BCD) Data Registers DR0 to DR15 Index Registers Indirect addressing ,IR0 to ,IR15 using Index Registers –2048 to +2047 ,IR0 to –2048 to +2047 ,IR15 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15...
Page 492: Double Bcd Subtract Without Carry: -Bl(415)
OFF in all other cases. Precautions If Mi and/or Su are not BCD, an error is generated and the Error Flag will turn If as a result of the subtraction, the content of R is 0000 hex, the Equals Flag will turn ON.
Page 493 ,–(– –)IR0 to, –(– –)IR15 Description –BL(415) subtracts the BCD values in Su and Su+1 from Mi and Mi+1 and outputs the result to R, R+1. If the result is negative, it is output to R, R+1 as a 10’s complement. (BCD)
Page 494 9999 – 7556 + 1 = 2444. For a four digit number, the 10’s complement of A is 9999 – A + 1 = B. To obtain the true number from the 10’s complement B: A = 10000 – B. For example, to obtain the true number from the 10’s complement 2444: 10000 –...
Page 495 – 09583960 + (100000000 – 17072641) R+1: D00101 R+1: D00100 9 2 5 1 1 3 1 9 The Carry Flag (CY) is ON, so the result is subtracted from 0000 0000. Subtraction at 2 Su+1: D00101 D00100 – 9 2 5 1 1 3 1 9 00000000 + (100000000 –...
Page 496: Bcd Subtract With Carry: -Bc(416)
Section 3-11 Symbol Math Instructions 3-11-15 BCD SUBTRACT WITH CARRY: –BC(416) Purpose Subtracts 4-digit (single-word) BCD data and/or constants with the Carry Flag (CY). Ladder Symbol –BC(416) Mi: Minuend word Su: Subtrahend word R: Result word Variations Variations Executed Each Cycle for ON Condition –BC(416)
Page 497: Double Bcd Subtract With Carry: -Bcl(417)
OFF in all other cases. Precautions If Mi and/or Su are not BCD, an error is generated and the Error Flag will turn If as a result of the subtraction, the content of R is 0000 hex, the Equals Flag will turn ON.
Page 498 ,–(– –)IR0 to, –(– –)IR15 Description –BCL(417)subtracts the BCD values in Su, Su+1, and CY from Mi and Mi+1 and outputs the result to R, R+1. If the result is negative, it is output to R, R+1 as a 10’s complement. (BCD)
Page 499: Signed Binary Multiply: *(420)
9999 – 7556 + 1 = 2444. For a four digit number, the 10’s complement of A is 9999 – A + 1 = B. To obtain the true number from the 10’s complement B: A = 10000 – B. For example, to obtain the true number from the 10’s complement 2444: 10000 –...
Page 500 –2048 to +2047 ,IR0 to –2048 to +2047 ,IR15 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15 Description *(420) multiplies the signed binary values in Md and Mr and outputs the result to R, R+1. (Signed binary) × (Signed binary)
Page 501: Double Signed Binary Multiply: *L(421)
If as a result of the multiplication, the content of R is 0000 hex, the Equals Flag will turn ON. If as a result of the multiplication, the content of the leftmost bit of R+1 and R is 1, the Negative Flag will turn ON.
Page 502 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15 Description *L(421) multiplies the signed binary values in Md and Md+1 and Mr and Mr+1 and outputs the result to R, R+1, R+2, and R+3. (Signed binary) Md + 1 (Signed binary) ×...
Page 503: Unsigned Binary Multiply: *U(422)
If as a result of the multiplication, the content of R, R+1, R+2, R+3 is 0000 hex, the Equals Flag will turn ON. If as a result of the multiplication, the content of the leftmost bit of R+1 is 1, the Negative Flag will turn ON.
Page 504 If as a result of the multiplication, the content of R, R+1 is 0000 hex, the Equals Flag will turn ON. If as a result of the multiplication, the content of the leftmost bit of R+1 is 1, the Negative Flag will turn ON.
Page 505: Double Unsigned Binary Multiply: *Ul(423)
Section 3-11 Symbol Math Instructions Example in Function Block Definition In the following example, an array variable is used to get the result from the function block as one word. a * b Function Block Variables Multiplicand: a (data type: UINT)
Page 506 If as a result of the multiplication, the content of R, R+1, R+2, R+3 is 0000 hex, the Equals Flag will turn ON. If as a result of the multiplication, the content of the leftmost bit of R+3 is 1, the Negative Flag will turn ON.
Page 507: Bcd Multiply: *B(424)
Section 3-11 Symbol Math Instructions 3-11-21 BCD MULTIPLY: *B(424) Purpose Multiplies 4-digit (single-word) BCD data and/or constants. Ladder Symbol *B(424) Md: Multiplicand word Mr: Multiplier word R: Result word Variations Variations Executed Each Cycle for ON Condition *B(424) Executed Once for Upward Differentiation @*B(424) Executed Once for Downward Differentiation Not supported.
Page 508 OFF in all other cases. Precautions If Md and/or Mr are not BCD, an error will be generated and the Error Flag will turn ON. If as a result of the multiplication, the content of R, R+1 is 0000 hex, the Equals Flag will turn ON.
Page 509: Double Bcd Multiply: *Bl(425)
Section 3-11 Symbol Math Instructions Example in Function Block Definition In the following example, an array variable is used to get the result from the function block as one word. a * b Function Block Variables Multiplicand: a (data type: WORD)
Page 510 OFF in all other cases. Precautions If Md, Md+1 and/or Mr, Mr+1 are not BCD, an error will be generated and the Error Flag will turn ON. If as a result of the multiplication, the content of R, R+1, R+2, R+3 is 00000000 hex, the Equals Flag will turn ON.
Page 511: Signed Binary Divide: /(430)
Symbol Math Instructions Section 3-11 3-11-23 SIGNED BINARY DIVIDE: /(430) Purpose Divides 4-digit (single-word) signed hexadecimal data and/or constants. Ladder Symbol /(430) Dd: Dividend word Dr: Divisor word R: Result word Variations Variations Executed Each Cycle for ON Condition /(430)
Page 512 If as a result of the division, the content of R is 0000 hex, the Equals Flag will turn ON. If as a result of the division, the content of the leftmost bit of R is 1, the Nega- tive Flag will turn ON.
Page 513: Double Signed Binary Divide: /L(431)
Section 3-11 Symbol Math Instructions Example in Function Block Definition In the following example, an array variable is used to get the quotient and remainder from the function block. a / b c ··· d Function Block Variables Dividend: a (data type: INT)
Page 514 If as a result of the division, the content of R+1, R is 00000000 hex, the Equals Flag will turn ON. If as a result of the division, the content of the leftmost bit of R+1, R is 1, the Negative Flag will turn ON.
Page 515: Unsigned Binary Divide: /U(432)
Section 3-11 Symbol Math Instructions quotient will be output to D00121 and D00120 and the remainder to D00123 and D00122. 3-11-25 UNSIGNED BINARY DIVIDE: /U(432) Purpose Divides 4-digit (single-word) unsigned hexadecimal data and/or constants. Ladder Symbol /U(432) Dd: Dividend word...
Page 516 If as a result of the division, the content of R is 0000 hex, the Equals Flag will turn ON. If as a result of the division, the content of the leftmost bit of R is 1, the Nega- tive Flag will turn ON.
Page 517: Double Unsigned Binary Divide: /Ul(433)
Symbol Math Instructions Section 3-11 Example in Function Block Definition In the following example, an array variable is used to get the quotient and remainder from the function block. a / b c ··· d Function Block Variables Dividend: a (data type: UINT)
Page 518 If as a result of the division, the content of R, R+1, is 0000 hex, the Equals Flag will turn ON. If as a result of the division, the content of the leftmost bit of R+1 is 1, the Neg- ative Flag will turn ON.
Page 519: Bcd Divide: /B(434)
Section 3-11 Symbol Math Instructions and the quotient will be output to D00121 and D00120 and the remainder to D00123 and D00122. 3-11-27 BCD DIVIDE: /B(434) Purpose Divides 4-digit (single-word) BCD data and/or constants. Ladder Symbol /B(434) Dd: Dividend word...
Page 520 OFF in all other cases. Precautions If Dd or Dr are not BCD or if the remainder (R+1) is 0, an error will be gener- ated and the Error Flag will turn ON. If as a result of the division, the content of R is 0000 hex, the Equals Flag will turn ON.
Page 521: Double Bcd Divide: /Bl(435)
Function Block Variables Dividend: a (data type: WORD) Divisor: b (data type: WORD) Quotient: c (data type: WORD) Remainder: d (data type: WORD) Temporary variable: tmp (data type: WORD, 2-element array) tmp[0] tmp[0] tmp[0] 3-11-28 DOUBLE BCD DIVIDE: /BL(435) Purpose Divides 8-digit (double-word) BCD data and/or constants.
Page 522 OFF in all other cases. Precautions If Dd, Dd+1 and/or Dr, Dr+1 are not BCD or the content of Dr, Dr+1 is 0, an error will be generated and the Error Flag will turn ON. If as a result of the division, the content of R, R+1 is 00000000 hex, the Equals Flag will turn ON.
Page 523: Conversion Instructions
Section 3-12 Conversion Instructions 3-12 Conversion Instructions This section describes instructions used for data conversion. Instruction Mnemonic Function code Page BCD TO BINARY DOUBLE BCD TO DOUBLE BINL BINARY BINARY TO BCD DOUBLE BINARY TO DOUBLE BCDL 2’S COMPLEMENT DOUBLE 2’S COMPLEMENT...
Page 524 –2048 to +2047 ,IR0 to –2048 to +2047 ,IR15 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15 Description BIN(023) converts the BCD data in S to binary data and writes the result to R. (BCD) (BIN) Flags Name...
Page 525: Double Bcd To Double Binary: Binl(058)
In this example, N words of BCD data is converted to binary data. If N = 3, the three words of BCD starting from D00010 will be converted to binary data one word at a time when CIO 00000 turns ON. The resulting binary data will be stored starting from D00100.
Page 526 Examples The following diagram shows an example of 8-digit BCD-to-binary conversion. When CIO 000000 is ON in the following example, the 8-digit BCD value in CIO 0010 and CIO 0011 is converted to hexadecimal and stored in D00200 and D00201.
Page 527: Binary To Bcd: Bcd(024)
+13X16 +7X16 +2X16 R+1: D00201 R: D00200 3-12-3 BINARY TO BCD: BCD(024) Purpose Converts a word of binary data to a word of BCD data. Ladder Symbol BCD(024) S: Source word R: Result word Variations Variations Executed Each Cycle for ON Condition...
Page 528 In this example, N words of binary data is converted to BCD data. If N = 3, the three words of binary starting from D00010 will be converted to binary data one word at a time when CIO 00000 turns ON. The resulting BCD...
Page 529: Double Binary To Double Bcd: Bcdl(059)
Step program areas Subroutines Interrupt tasks Operands S: First Source Word The content of S+1 and S must be between 0000 0000 and 05F5 E0FF hexa- decimal (0000 0000 and 9999 9999 decimal). Operand Specifications Area CIO Area CIO 0000 to CIO 6142...
Page 530 The following diagram shows an example of 8-digit BCD-to-binary conversion. When CIO 000000 is ON in the following example, the hexadecimal value in CIO 0011 and CIO 0010 is converted to a BCD value and stored in D00200 and D00201.
Page 531: 2'S Complement: Neg(160)
+13X16 +3X16 +2X16 +10=2961930 R+1: D00101 R: D00100 3-12-5 2’S COMPLEMENT: NEG(160) Purpose Calculates the 2’s complement of a word of hexadecimal data. Ladder Symbol NEG(160) S: Source word R: Result word Variations Variations Executed Each Cycle for ON Condition...
Page 532 2’s complement calculation basically reverses the status of the bits in S and adds 1. 2's complement (Complement + 1) Note This operation (reversing the status of the bits and adding 1) is equivalent to subtracting the content of S from 0000. Flags Name...
Page 533: Double 2'S Complement: Negl(161)
,IR0 to ,IR15 using Index Registers –2048 to +2047 ,IR0 to –2048 to +2047 ,IR15 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15 Note R and R+1 must be in the same data area.
Page 534: 16-Bit To 32-Bit Signed Binary: Sign(600)
S+1 and S and adds 1. 2's complement (Complement + 1) (S+1, S) (R+1, R) Note This operation (reversing the status of the bits and adding 1) is equivalent to subtracting the content of S+1 and S from 0000 0000. Flags Name Label...
Page 535 R+1 and R. The conversion is accomplished by copying the content of S to R and writing FFFF to R+1 if bit 15 of S is 1 or writing 0000 to R+1 if bit 15 of S is 0. Source word (S) If bit 15 of S is 1, FFFF is transferred to R+1.
Page 536: Data Decoder: Mlpx(076)
Subroutines Interrupt tasks Operands S: Source Word The data in the source word indicates the location of the bit(s) that will be turned ON. C: Control Word The control word specifies whether MLPX(076) will perform a 4-to-16 bit con- version or an 8-to-256 bit conversion, the number of digits or bytes to be con-...
Page 537 ,–(– –)IR0 to, –(– –)IR15 Description MLPX(076) can perform 4-to-16 bit or 8-to-256 bit conversions. Set the left- most digit of C to 0 to specify 4-to-16 bit conversion and set it to 1 to specify 8- to-256 bit conversion. 4-to-16 bit Conversion When the leftmost digit of C is 0, MLPX(076) takes the value of the specified digit in S (0 to F) and turns ON the corresponding bit in the result word.
Page 538 Section 3-12 Conversion Instructions other bits in the result word will be turned OFF. Up to four digits can be con- verted. l =1 (Convert 2 digits.) n=2 (Start with third digit.) 4-to-16 bit decoding (Bit m of R is turned ON.)
Page 539 When CIO 000000 is ON in the following example, MLPX(076) will convert 3 digits in S beginning with digit 1 (the second digit), as indicated by C (#0021). The corresponding bits in D00100, D00101, and D00102 will be turned ON.
Page 540: Data Encoder: Dmpx(077)
D00131 3-12-9 DATA ENCODER: DMPX(077) Purpose FInds the location of the first or last ON bit within the source word (or 16-word range), and writes that value to the specified digit (or byte) in the result word. Ladder Symbol DMPX(077)
Page 541 Section 3-12 Conversion Instructions R: Result Word The locations of the bits that were ON in the source word(s) are written to the digits/bytes in R starting with the specified first digit/byte. C: Control Word The control word specifies whether DMPX(077) will perform a 16-to-4 bit con-...
Page 542 Conversion Instructions Description DMPX(077) can perform 16-to-4 bit or 256-to-8 bit conversions. Set the left- most digit of C to 0 to specify 16-to-4 bit conversion and set it to 1 to specify 256-to-8 bit conversion. 16-to-4 bit Conversion When the fourth (leftmost) digit of C is 0, DMPX(077) finds the locations of the leftmost or rightmost ON bits in up to 4 source words and writes these loca- tions to R beginning with the specified digit.
Page 543 16-word ranges of source words. The locations of these bits are written to R beginning with the specified byte. (Set the third digit of C to 0 to find the leftmost ON bits or 1 to find the rightmost ON bits.) l =0 (Convert one 16-word range.)
Page 544: Ascii Convert: Asc(086)
When CIO 000000 is ON in the following example, DMPX(077) will find the leftmost ON bits in CIO 0100, CIO 0101, and CIO 0102 and write those loca- tions to 3 digits in R beginning with digit 1 (the second digit), as indicated by C (#0021).
Page 545 The converted ASCII data is written to the destination word(s) beginning with the specified byte in D. Three destination words (D to D+3) will be required if 4 digits are being converted and the leftmost byte is selected as the first byte in D.
Page 546 Manual (W341) for a table of extended ASCII characters. Parity It is possible to specify the parity of the ASCII data for use in error control dur- ing data transmissions. The leftmost bit of each ASCII character will be auto- matically adjusted for even, odd, or no parity.
Page 547 D00200 and D00201 beginning with the leftmost byte in D00200. In this case, a digit designator of #0121 specifies no parity, the starting byte (when writing) = leftmost byte, the number of digits to read = 3, and the starting digit (when reading) = digit 1.
Page 548: Ascii To Hex: Hex(162)
Section 3-12 Conversion Instructions 3-12-11 ASCII TO HEX: HEX(162) Purpose Converts up to 4 bytes of ASCII data in the source word to their hexadecimal equivalents and writes these digits in the specified destination word. Ladder Symbol HEX(162) S: First source word...
Page 549 Description HEX(162) treats the contents of the source word(s) as ASCII data represent- ing hexadecimal digits (0 to 9 and A to F), converts the specified number of bytes to hexadecimal, and writes the hexadecimal data to the destination word beginning at the specified digit.
Page 550 First digit to write Parity It is possible to specify the parity of the ASCII data for use in error control dur- ing data transmissions. The leftmost bit in each byte is the parity bit. With no parity the parity bit should always be zero, with even parity the status of the parity bit should result in an even number of ON bits, and with odd parity the status of the parity bit should result in an odd number of ON bits.
Page 551 OFF in all other cases. Precautions An error will occur and the Error Flag will be turned ON if there is a parity error in the ASCII data, the ASCII data in the source words is not equivalent to hexadecimal digits, or the content of Di is not within the specified ranges.
Page 552: Column To Line: Line(063)
S: First Source Word Specifies the first source word. S and S+15 must be in the same data area. N: Bit Number Specifies the bit number (0000 to 000F or &0 to &15) to be copied from the source words.
Page 553 S+15 to the destination word D. Bit N of S+m is copied to bit m of D, i.e., bit N of S is copied to bit 00 of D and bit N of S+15 is copied to bit 15 of D.
Page 554: Line To Column: Colm(064)
&5 D: D00200 3-12-13 LINE TO COLUMN: COLM(064) Purpose Converts the 16 bits of the source word to a column of bits in a 16-word range of destination words (the same bit number in 16 consecutive words). Ladder Symbol COLM(064)
Page 555 Section 3-12 Conversion Instructions N: Bit Number Specifies the bit number (0000 to 000F or &0 to &15) to be overwritten by the source word. Operand Specifications Area CIO Area CIO 0000 to CIO 0000 to CIO 0000 to CIO 6143...
Page 556 COLM(064) copies the 16 bits from S to the 16 bits with bit number N in the 16-word range D to D+15. Bit m of S is copied to bit N of D+m, i.e., bit 00 of S is copied to bit N of D and bit 15 of S is copied to bit N of D+15.
Page 557: Signed Bcd To Binary: Bins(470)
Section 3-12 Conversion Instructions 3-12-14 SIGNED BCD TO BINARY: BINS(470) Purpose Converts one word of signed BCD data to one word of signed binary data. Ladder Symbol BINS(470) C: Control word S: Source word D: Destination word Variations Variations Executed Each Cycle for ON Condition...
Page 558 Refer to 3-12-52’S COMPLEMENT: NEG(160) for details. A value of –0 in the source data will be treated as 0 and will not cause an error. Also, the status of bits 13 to 15 of S is not checked when C=0000.
Page 559 Examples BCD Format 0 (C=#0000) When CIO 000000 is ON in the following example, the signed BCD data for- mat and range in D00100 are checked against the format specified in the con- trol word (0000). The source data is correct, so the signed BCD data in D00100 is converted to signed binary and output to D00200.
Page 560: Double Signed Bcd To Binary: Bisl(472)
Applicable Program Areas Block program areas Step program areas Subroutines Interrupt tasks Operands C: Control Word Specifies the signed BCD format. C must be 0000 to 0003. Operand Specifications Area CIO Area CIO 0000 to CIO 0000 to CIO 6142 CIO 6143...
Page 561 3-12-6 DOUBLE 2’S COMPLEMENT: NEGL(161) for details. Values of –0 in the source data will be treated as 0 and will not cause an error. Also, the status of bits 13 to 15 of S+1 is not checked when C=0000.
Page 562 D00101 and D00100 are checked against the format specified in the control word (0002). The source data is correct, so the double signed BCD data in D00101 and D00100 is converted to double signed binary and output to D00201 and D00200.
Page 563: Signed Binary To Bcd: Bcds(471)
Section 3-12 Conversion Instructions 3-12-16 SIGNED BINARY TO BCD: BCDS(471) Purpose Converts one word of signed binary data to one word of signed BCD data. Ladder Symbol BCDS(471) C: Control word S: Source word D: Destination word Variations Variations Executed Each Cycle for ON Condition...
Page 564 BCDS(471) converts signed binary data to signed BCD data. First the signed binary data in word S is checked to verify that it is within the valid range for the signed BCD format specified in the control word (C). If the source data is cor- rect, the signed binary data in S is converted to signed BCD and output to D.
Page 565: Double Signed Binary To Bcd: Bdsl(473)
A: Negative (–1) F: Negative (–) The following table shows the possible signed binary values for each signed BCD format. An error will occur if the source data is not within the allowed range for the specified signed BCD format. Setting...
Page 566 Specifies the signed BCD format. C must be 0000 to 0003. S: First Source Word Source words S+1 and S contain the double signed binary data to be con- verted. Their content must be within the valid range of the BCD format speci- fied in C.
Page 567 Signed BCD Signed binary Note 1. Values of –0 in the source data will be treated as 0 and will not cause an error. 2. Some Special I/O Units require signed BCD data inputs. BDSL(473) can be used to convert double signed binary data for output to these Units.
Page 568 A: Negative (–1) F: Negative (–) The following table shows the possible double signed binary values for each signed BCD format. An error will occur if the source data is not within the allowed range for the specified signed BCD format. Setting...
Page 569: Gray Code Convert: Gry(474)
User-specified Resolution 0 hex = 256, 1 hex = 360, 2 hex = 720, 3 hex = 1,024, 4 to F hex = Do not use. Note: The above setting is valid when the resolution is set to 0 hex in bits 00 to 03 of C.
Page 570 Destination words D+1 and D contain the results of converting the gray binary code at the resolution specified in bits 00 to 03 of the control data word C and the conversion mode specified in bits 04 to 07 of the control data word C. The leftmost word is output to D+1 and the rightmost word is output to D.
Page 571 ) from an absolute encoder that outputs a gray binary code. 2. If the word specified for S is allocated to an Input Unit, the input data con- verted by GRY(474) will be for the gray binary code from the previous CPU Unit cycle, i.e., it will be one cycle time old.
Page 572 Section 3-12 Conversion Instructions condition in a CPU Unit that does not support it, an error will occur and pro- gram execution will stop. ■ Restrictions on the CX-Programmer GRY(474) can be used only with CX-Programmer version 3.2 or later.
Page 573 Section 3-12 Conversion Instructions ■ Example 1: Converting to Binary Data with an 8-bit Resolution and Zero Point Offset of 001A Hex C: D00000 Resolution: 8-bit Conversion mode: Binary Mode Operating mode: Gray binary code conversion C+1: D00001 001A Zero point offset: 001A hex C+2: D00002 User-specified resolution: Not used.
Page 574: Four-Digit Number To Ascii: Str4(601)
Result of BCD conversion and offsetting stored. D+1: D00201 0000 3-12-19 FOUR-DIGIT NUMBER TO ASCII: STR4(601) Purpose Converts a 4-digit hexadecimal number (#0000 to #FFFF) to ASCII data (4 characters). This instruction is supported by CS/CJ-series CPU Units with unit version 4.0 or later only.
Page 575 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15 Description STR4(601) converts the numerical data in S (4-digit hexadecimal, #0000 to #FFFF) to ASCII data (4 characters) and writes the result to D and D+1.
Page 576 Hexadecimal: #1234 ASCII Note If the source data is 0, the Equals Flag will turn ON. If the leftmost bit of the source data is 1, the Negative Flag will turn ON. Restrictions The following restrictions apply to STR4(601). ■ Restrictions on the CPU Unit STR4(601) can be used in CPU Units with unit version 4.0 or later only.
Page 577: Eight-Digit Number To Ascii: Str8(602)
When CIO 000001 is ON in the following example, the source data in D00000 (&1234 in decimal) is converted to BCD data and the result is stored tempo- rarily in D00010. Next, the BCD data is converted to ASCII data and the result is output to D00100 and D00101.
Page 578 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15 Description STR8(602) converts the numerical data in S and S+1 (8-digit hexadecimal, #0000 0000 to #FFFF FFFF) to ASCII data (8 characters) and writes the result to D, D+1, D+2, and D+3.
Page 579: Sixteen-Digit Number To Ascii: Str16(603)
Hexadecimal: #12345678 ASCII Note If the source data is 0, the Equals Flag will turn ON. If the leftmost bit of the source data is 1, the Negative Flag will turn ON. Restrictions The following restrictions apply to STR8(602). ■ Restrictions on the CPU Unit STR8(602) can be used in CPU Units with unit version 4.0 or later only.
Page 580 ,–(– –)IR0 to, –(– –)IR15 Description STR16(603) converts the numerical data in S to S+3 (16-digit hexadecimal, #0000 0000 0000 0000 to #FFFF FFFF FFFF FFFF) to ASCII data (16 char- acters) and writes the result to D to D+7. Hexadecimal: #1234567890ABCDEF...
Page 581: Ascii To Four-Digit Number: Num4(604)
Section 3-12 Conversion Instructions Note If the source data is 0, the Equals Flag will turn ON. If the leftmost bit of the source data is 1, the Negative Flag will turn ON. Restrictions The following restrictions apply to STR16(603).
Page 582 (4-digit hexadecimal) and writes the result to D. The Error Flag will be turned ON if the ASCII data in S and S+1 contains any characters that are not hexadecimal digits. In this case, the instruction will not be executed.
Page 583 Example 1: Converting 3 Sets of 4 ASCII Characters to the Equivalent Hexadecimal Digits When CIO 000000 is ON in the following example, the 6 words of ASCII data starting at D00010 are converted, two words at a time, to numerical data. The converted numerical data is stored in the DM Area starting at D00100.
Page 584: Ascii To Eight-Digit Number: Num8(605)
DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15 Description NUM8(605) converts the 8 characters of ASCII data in S to S+3 to numerical data (4-digit hexadecimal) and writes the result to D and D+1.
Page 585: Ascii To Sixteen-Digit Number: Num16(606)
ASCII Hexadecimal Note If the numerical data is 0, the Equals Flag will turn ON. If the leftmost bit of the numerical data is 1, the Negative Flag will turn ON. Restrictions The following restrictions apply to NUM8(605). ■ Restrictions on the CPU Unit NUM8(605) can be used in CPU Units with unit version 4.0 or later only.
Page 586 ,–(– –)IR0 to, –(– –)IR15 Description NUM16(606) converts the 16 characters of ASCII data in S to S+7 to numeri- cal data (4-digit hexadecimal) and writes the result to D and D+3. The Error Flag will be turned ON if the ASCII data contains any characters that are not hexadecimal digits.
Page 587 ASCII Hexadecimal Note If the numerical data is 0, the Equals Flag will turn ON. If the leftmost bit of the numerical data is 1, the Negative Flag will turn ON. Restrictions The following restrictions apply to NUM16(606). ■ Restrictions on the CPU Unit NUM16(606) can be used in CPU Units with unit version 4.0 or later only.
Page 588: Logic Instructions
DOUBLE EXCLUSIVE NOR XNRL COMPLEMENT DOUBLE COMPLEMENT COML 3-13-1 LOGICAL AND: ANDW(034) Purpose Takes the logical AND of corresponding bits in single words of word data and/ or constants. Ladder Symbol ANDW(034) : Input 1 : Input 2 R: Result word...
Page 589 When ANDW(034) is executed, the Error Flag will turn OFF. If as a result of the AND, the content of R is 0000 hex, the Equals Flag will turn ON. If as a result of the AND, the leftmost bit of R is 1, the Negative Flag will turn...
Page 590: Double Logical And: Andl(610)
Section 3-13 Logic Instructions 3-13-2 DOUBLE LOGICAL AND: ANDL(610) Purpose Takes the logical AND of corresponding bits in double words of word data and/ or constants. Ladder Symbol ANDL(610) : Input 1 : Input 2 R: Result word Variations Variations...
Page 591: Logical Or: Orw(035)
If as a result of the AND, the content of R, R+1 is 00000000 hex, the Equals Flag will turn ON. If as a result of the AND, the leftmost bit of R+1 is 1, the Negative Flag will turn ON.
Page 592 • The logical OR is taken of corresponding bits in I and I in succession. • When either one of the corresponding bits in I and I are 1 or when both of them are 0, a 0 will be output to the corresponding bit in R.
Page 593: Double Logical Or: Orwl(611)
When ORW(035) is executed, the Error Flag will turn OFF. If as a result of the OR, the content of R is 0000 hex, the Equals Flag will turn If as a result of the OR, the leftmost bit of R is 1, the Negative Flag will turn...
Page 594 If as a result of the OR, the content of R, R+1 is 00000000 hex, the Equals Flag will turn ON. If as a result of the OR, the leftmost bit of R+1 is 1, the Negative Flag will turn...
Page 595: Exclusive Or: Xorw(036)
Logic Instructions Examples When the execution condition CIO 00000000 is ON, the logical OR is taken of corresponding bits in CIO 0021, CIO 0020 and CIO 0301, CIO 0300 and the results will be output to corresponding bits in D00501 and D00500.
Page 596 When XORW(036) is executed, the Error Flag will turn OFF. If as a result of the OR, the content of R is 0000 hex, the Equals Flag will turn If as a result of the OR, the leftmost bit of R is 1, the Negative Flag will turn...
Page 597: Double Exclusive Or: Xorl(612)
Section 3-13 Logic Instructions 3-13-6 DOUBLE EXCLUSIVE OR: XORL(612) Purpose Takes the logical exclusive OR of corresponding bits in double words of word data and/or constants. Ladder Symbol XORL(612) : Input 1 : Input 2 R: Result word Variations Variations...
Page 598 +1, I and I +1are different, a 1 will be output to the corresponding bit it R, R+1. When any of them are the same, a 0 will be output to the corresponding bit in R, R+1. +1), (I +1) + (I...
Page 599: Exclusive Nor: Xnrw(037)
Section 3-13 Logic Instructions 3-13-7 EXCLUSIVE NOR: XNRW(037) Purpose Takes the logical exclusive NOR of corresponding single words of word data and/or constants. Ladder Symbol XNRW(037) : Input 1 : Input 2 R: Result word Variations Variations Executed Each Cycle for ON Condition...
Page 600: Double Exclusive Nor: Xnrl(613)
If as a result of the NOR, the content of R is 0000 hex, the Equals Flag will turn ON. If as a result of the NOR, the leftmost bit of R is 1, the Negative Flag will turn 3-13-8 DOUBLE EXCLUSIVE NOR: XNRL(613)
Page 601 +1, I and I +1are different, a 0 will be output to the corresponding bit in R, R+1. When any of them are the same, a 1 will be output to the corresponding bit in R, R+1. +1), (I +1) + (I...
Page 602: Complement: Com(029)
Precautions When XNRL(613) is executed, the Error Flag will turn OFF. If as a result of the exclusive NOR, the content of R, R+1 is 00000000 hex, the Equals Flag will turn ON. If as a result of the exclusive NOR, the leftmost bit of R+1 is 1, the Negative Flag will turn ON.
Page 603 When COM(029) is executed, the Error Flag will turn OFF. If as a result of COM, the content of R is 0000 hex, the Equals Flag will turn If as a result of COM, the leftmost bit of R is 1, the Negative Flag will turn ON. Examples When CIO 000000 is ON in the following example, the status of each bit will be D00100 is reversed.
Page 604: Double Complement: Coml(614)
Section 3-13 Logic Instructions 3-13-10 DOUBLE COMPLEMENT: COML(614) Purpose Turns OFF all ON bits and turns ON all OFF bits in Wd and Wd+1. Ladder Symbol COML(614) Wd: Word Variations Variations Executed Each Cycle for ON Condition COML(614) Executed Once for Upward Differentiation @COML(614) Executed Once for Downward Differentiation Not supported.
Page 605: Special Math Instructions
If as a result of COML, the content of R, R+1 is 00000000 hex, the Equals Flag will turn ON. If as a result of COML, the leftmost bit of R+1 is 1, the Negative Flag will turn Examples When CIO 000000 is ON in the following example, the status of each bit in D00100 and D00101 will be reversed.
Page 606 Binary data (32 bits) Binary data (16 bits) The range of data that can be specified for words S+1 and S is 0000 0000 to 3FFF FFFF. If a number from 4000 0000 to 7FFF FFFF is specified, it will be treated as 3FFF FFFF for the square root computation.
Page 607: Bcd Square Root: Root(072)
If the input data is BCD, use the ROOT(072) instruction. Example When CIO 000000 is ON in the following example, ROTB(620) calculates the square root of the data in CIO 0002 and CIO 0001, and writes the integer por- tion of the result in D00100. CIO 0002...
Page 608 ON if the result is 0000. OFF in all other cases. Precautions The operands of this instruction (S+1, S, and R) are all treated as BCD val- ues. If the input data is binary, use the ROTB(620) instruction. Examples Square Root of 8-digit Number...
Page 609 Truncated Square Root of a 4-digit Number The following example shows how to take the square root of a 4-digit number and round off the result. This program example calculates the square root of the 4-digit number in CIO 0010, rounds off the result, and writes it to CIO 0011.
Page 610 @MOV @ROOT @MOV @MOV @MOVD @MOVD @INC 1,2,3... 1. The source words (D00101 and D00100) to be are cleared to 0000 0000. D00101 D00100 0000 0000 2. The 4-digit number is moved to D00101. D00101 D00100 3. ROOT(072) calculates the square root of D00101 and D00100 and writes...
Page 611: Arithmetic Process: Apr(069)
4. D00103 and the result word, CIO 0011, are cleared to 0000 0000. D00103 CIO 0011 0000 0000 5. The result of the square root calculation is divided by 100, with the integer portion written to CIO 0011 and the remainder going to D00103. D00102 CIO 0011 D00103 6.
Page 612 1. Signed binary data and floating-point data are supported by CS1-H, CJ1- H, CJ1M, and CS1D CPU Units only. 2. If C is a word address, APR(069) extrapolates the Y value for the X value in S based on coordinates (forming line segments) entered in advance in a table beginning at C.
Page 613 When C is 0000, APR(069) calculates the SIN(S) and writes the result to R. The range for S is 0000 to 0900 BCD (0.0 to 90.0 ) and the range for R is 0000 to 9999 BCD (0.0000 to 0.9999). The remainder of the result beyond the fourth decimal place is eliminated.
Page 614 If 16-bit binary or BCD data is being used, the line-segment data is contained in words C+ 1 through C+2m+2. If 32-bit binary or floating point data is being used (CS1-H, CJ1-H, and CJ1M CPU Units only), the line-segment data is contained in words C+ 1 through C+4m+4.
Page 615 Section 3-14 Special Math Instructions 15 determines whether the input is BCD or binary: OFF specifies binary and ON specifies BCD. 16-bit BCD16-bit binary (signed Floating-point data 32-bit signed binary data or unsigned) or 16-bit BCD data X0 (rightmost 16 bits)
Page 616 3. X < S Converted value = Y Up to 256 endpoints can be stored in the line-segment data table beginning at C+1. The following 5 kinds of I/O data can be used: • 16-bit unsigned BCD data • 16-bit unsigned binary data •...
Page 617 Floating-point specification 0: Integer data Note If the “Data length specification for S and D” in bit 10 of C is set to 1 and a 16-bit constant is input for S, the input data will be converted to 32-bit signed binary before the linear extrapolation calculation.
Page 618 ON if bit 15 of R is ON. OFF in all other cases. Precautions The actual result for SIN(90 ) and COS(0 ) is 1, but 9999 (0.9999) will be out- put to R. An error will occur if C is a constant greater than 0001.
Page 619 12 + 2)). The input data is taken from CIO 0010, and the result is output to CIO 0011. Content Coordinate 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 D00000 000B Hex D00001 05F0 Hex (m–1 = 11: 12 line...
Page 620 Section 3-14 Special Math Instructions $1F20 $0F00 (x,y) $0726 $0402 (0,0) $0005 $0014 $001A $05F0 The linear-extrapolation calculation is shown below. 0402 0F00 – -------------------------------- - 0F00 0014 0015 – 001A 0005 – 0F00 0086 000F – 0726 Values are all hexadecimal (Hex).
Page 621 Linear Extrapolation (C: Word Address) Using 32-bit Signed Binary Data (CS1-H, CJ1-H, CJ1M, and CS1D Only) In this example, APR(069) is used to convert the fluid height in a tank to fluid volume based on the shape of the holding tank.
Page 622 Linear Extrapolation (C: Word Address) Using Floating-point Data (CS1-H, CJ1-H, CJ1M, and CS1D Only) In this example, APR(069) is used to convert the fluid height in a tank to fluid volume based on the shape of the holding tank. X0 (rightmost 16 bits)
Page 623: Floating Point Divide: Fdiv(079)
Section 3-14 Special Math Instructions 3-14-4 FLOATING POINT DIVIDE: FDIV(079) Purpose Divides one 7-digit floating-point number by another. The floating-point num- bers are expressed in scientific notation (7-digit mantissa and 1-digit expo- nent). Ladder Symbol FDIV(079) Dd: First dividend word...
Page 624 The leftmost digit can range from 0 to F; positive exponents range from 0 to 7 and negative exponents range from 8 to F (0 to –7). The rightmost 7 digits must be BCD.
Page 625 0.4592703 10 × Floating-point Division of Two BCD Numbers In this example, the 4-digit BCD number in D00000 is divided by the 4-digit BCD number in D00001 and the floating-point result is written to D00003 and D00002. To perform the floating point division, the BCD value in D00000 is converted to floating-point format in D00101 and D00100 and the BCD value in D00001 is converted to floating-point format in D00103 and D00102.
Page 626 1. D00100 and D00102 are set to 0000. 2. D00101 and D00103 are set to 4000. D00101 D00100 D00103 D00102 4000 0000 4000 0000 3. MOVD(083) is used to move the digits of the original source words to the proper digits in the 2-word floating-point formats.
Page 627: Bit Counter: Bcnt(067)
Step program areas Subroutines Interrupt tasks Operands N: Number of words The number of words must be 0001 to FFFF (1 to 65,535 words). S: First source word S and S+(N–1) must be in the same data area. Operand Specifications Area...
Page 628 An error will occur if N=0000 or the result exceeds FFFF. Example When CIO 000000 is ON in the following example, BCNT(067) counts the total number of ON bits in the 10 words from CIO 0100 through CIO 0109 and writes the result to D00100. 000000...
Page 629: Floating-Point Math Instructions
EXPONENTIAL POWER MOVE FLOATING-POINT MOVF (SINGLE) In addition to the instructions listed above, the CS1-H/CJ1-H CPU Units sup- port the following floating-point comparison and conversion instructions. Refer to 3-16-21 Double-precision Floating-point Input Instructions for details on double-precision floating-point instructions. Instruction...
Page 630 *NaN (not a number) is not a valid floating-point number. Executing floating- point calculation instructions will not result in NaN. Writing Floating-point When floating-point is specified for the data format in the I/O memory edit dis- Data play in the CX-Programmer, standard decimal numbers input in the display are automatically converted to the floating-point format shown above (IEEE754-format) and written to I/O Memory.
Page 631 Example 31 30 23 22 1 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Sign: –...
Page 632 0.0. Infinity Values of + and – can be expressed by setting the sign to 0 for positive or 1 for negative. The exponent will be 255 (2 – 1) and the mantissa will be 0.
Page 633 Section 3-15 Floating-point Math Instructions gin and the angle ( , in degrees) are found and output to D00100 and D00101. In the result, everything to the right of the decimal point is truncated. P (100, 100) 000000 D00000 D00200...
Page 634: Floating To 16-Bit: Fix(450)
FLT(452) is used to convert the binary data to floating- point data. c) The value of x that has been converted to floating-point data is output to D00203 and D00202. d) The value of y that has been converted to floating-point data is output to D00205 and D00204.
Page 635 Floating-point data (32 bits) Signed binary data (16 bits) Only the integer portion of the floating-point data is converted, and the fraction portion is truncated. The integer portion of the floating-point data must be within the range of –32,768 to 32,767.
Page 636: Floating To 32-Bit: Fixl(451)
ON if bit 15 of the result is ON. OFF in all other cases. Precautions The content of S+1 and S must be floating-point data and the integer portion must be in the range of –32,768 to 32,767. 3-15-2 FLOATING TO 32-BIT: FIXL(451)
Page 637: 16-Bit To Floating: Flt(452)
ON if bit 15 of R+1 is ON after execution. OFF in all other cases. Precautions The content of S+1 and S must be floating-point data and the integer portion must be in the range of –2,147,483,648 to 2,147,483,647. 3-15-3 16-BIT TO FLOATING: FLT(452)
Page 638 Signed binary data (16 bits) Floating-point data (32 bits) Only values within the range of –32,768 to 32,767 can be specified for S. To convert signed binary data outside of that range, use FLTL(453).
Page 639: 32-Bit To Floating: Fltl(453)
Negative Flag ON if the result is negative. OFF in all other cases. Precautions The content of S must contain signed binary data with a (decimal) value in the range of –32,768 to 32,767. 3-15-4 32-BIT TO FLOATING: FLTL(453) Purpose Converts a 32-bit signed binary value to 32-bit floating-point data and places the result in the specified result words.
Page 640 ON if the result is negative. OFF in all other cases. Precautions The result will not be exact if a number with an absolute value greater than 16,777,215 (the maximum value that can be expressed in 24-bits) is con- verted.
Page 641: Floating-Point Add: +F(454)
Section 3-15 Floating-point Math Instructions 3-15-5 FLOATING-POINT ADD: +F(454) Purpose Adds two 32-bit floating-point numbers and places the result in the specified result words. Ladder Symbol +F(454) Au: First augend word AD: First addend word R: First result word Variations...
Page 642 Overflow Flag will turn ON and the result will be output as If the absolute value of the result is less than the minimum value that can be expressed as floating-point data, the Underflow Flag will turn ON and the result will be output as 0.
Page 643: Floating-Point Subtract: -F(455)
Section 3-15 Floating-point Math Instructions 3-15-6 FLOATING-POINT SUBTRACT: –F(455) Purpose Subtracts one 32-bit floating-point number from another and places the result in the specified result words. Ladder Symbol –F(455) Mi: First Minuend word Su: First Subtrahend word R: First result word...
Page 644 Overflow Flag will turn ON and the result will be output as If the absolute value of the result is less than the minimum value that can be expressed as floating-point data, the Underflow Flag will turn ON and the result will be output as 0.
Page 645 Section 3-15 Floating-point Math Instructions 3-15-7 FLOATING-POINT MULTIPLY: *F(456) Purpose Multiplies two 32-bit floating-point numbers and places the result in the speci- fied result words. Ladder Symbol *F(456) Md: First Multiplicand word Mr: First Multiplier word R: First result word...
Page 646: Floating-Point Multiply: *F(456)
Overflow Flag will turn ON and the result will be output as If the absolute value of the result is less than the minimum value that can be expressed as floating-point data, the Underflow Flag will turn ON and the result will be output as 0.
Page 647: Floating-Point Divide: /F(457)
Section 3-15 Floating-point Math Instructions 3-15-8 FLOATING-POINT DIVIDE: /F(457) Purpose Divides one 32-bit floating-point number by another and places the result in the specified result words. Ladder Symbol /F(457) Dd: First Dividend word Dr: First Divisor word R: First result word...
Page 648 Overflow Flag will turn ON and the result will be output as If the absolute value of the result is less than the minimum value that can be expressed as floating-point data, the Underflow Flag will turn ON and the result will be output as 0.
Page 649: Degrees To Radians: Rad(458)
Section 3-15 Floating-point Math Instructions 3-15-9 DEGREES TO RADIANS: RAD(458) Purpose Converts a 32-bit floating-point number from degrees to radians and places the result in the specified result words. Ladder Symbol RAD(458) S: First source word R: First result word...
Page 650: Radians To Degrees: Deg(459)
Overflow Flag will turn ON and the result will be output as If the absolute value of the result is less than the minimum value that can be expressed as floating-point data, the Underflow Flag will turn ON and the result will be output as 0.
Page 651 Overflow Flag will turn ON and the result will be output as If the absolute value of the result is less than the minimum value that can be expressed as floating-point data, the Underflow Flag will turn ON and the...
Page 652: Sine: Sin(460)
ON if the result is negative. OFF in all other cases. Precautions The source data in S+1 and S must be in IEEE754 floating-point data format. 3-15-11 SINE: SIN(460) Purpose Calculates the sine of a 32-bit floating-point number (in radians) and places the result in the specified result words.
Page 653 Source (32-bit floating-point data) Result (32-bit floating-point data) Specify the desired angle (–65,535 to 65,535) in radians in S+1 and S. If the angle is outside of the range –65,535 to 65,535, an error will occur and the instruction will not be executed. For information on converting from degrees to radians, see 3-15-22 LOGARITHM: LOG(468) DEGREES TO RADIANS: RAD(458).
Page 654: High-Speed Sine: Sinq(475)
ON if the result is negative. OFF in all other cases. Precautions The source data in S+1 and S must be in IEEE754 floating-point data format. 3-15-12 HIGH-SPEED SINE: SINQ(475) Purpose Calculates the sine of a 32-bit floating-point number (in radians) and places the result in the specified result words.
Page 655: Cosine: Cos(461)
Source (32-bit floating-point data) Result (32-bit floating-point data) Specify the desired angle (–65,535 to 65,535) in radians in S+1 and S. If the angle is outside of the range –65,535 to 65,535, an unpredictable value will be output, but the Error Flag will not be turned ON. For information on converting between degrees and radians, see 3-15-9 DEGREES TO RADIANS: RAD(458) and 3-15-10 RADIANS TO DEGREES: DEG(459) .
Page 656 Description COS(461) calculates the cosine of the angle (in radians) expressed as a 32- bit floating-point value in S+1 and S and places the result in R+1 and R. (The floating point source data must be in IEEE754 format.) Source (32-bit floating-point data) Result (32-bit floating-point data) Specify the desired angle (–65,535 to 65,535) in radians in S+1 and S.
Page 657: High-Speed Cosine: Cosq(476)
ON if the result is negative. OFF in all other cases. Precautions The source data in S+1 and S must be in IEEE754 floating-point data format. 3-15-14 HIGH-SPEED COSINE: COSQ(476) Purpose Calculates the cosine of a 32-bit floating-point number (in radians) and places the result in the specified result words.
Page 658 Description COSQ(476) calculates the cosine of the angle (in radians) expressed as a 32- bit floating-point value in S+1 and S and places the result in R+1 and R. (The floating point source data must be in IEEE754 format.) Source (32-bit floating-point data) Result (32-bit floating-point data) Specify the desired angle (–65,535 to 65,535) in radians in S+1 and S.
Page 659: Tangent: Tan(462)
• The Condition Flags are not refreshed. • An unpredictable value will be output if the angle data is out-of-range. • The data cannot be input or output at a Programming Console. A question mark will be displayed. 3-15-15 TANGENT: TAN(462)
Page 660 Description TAN(462) calculates the tangent of the angle (in radians) expressed as a 32- bit floating-point value in S+1 and S and places the result in R+1 and R. (The floating point source data must be in IEEE754 format.) Source (32-bit floating-point data) Result (32-bit floating-point data) Specify the desired angle (–65,535 to 65,535) in radians in S+1 and S.
Page 661: High-Speed Tangent: Tanq(477)
ON if the result is negative. OFF in all other cases. Precautions The source data in S+1 and S must be in IEEE754 floating-point data format. 3-15-16 HIGH-SPEED TANGENT: TANQ(477) Purpose Calculates the tangent of a 32-bit floating-point number (in radians) and places the result in the specified result words.
Page 662 Description TANQ(477) calculates the tangent of the angle (in radians) expressed as a 32- bit floating-point value in S+1 and S and places the result in R+1 and R. (The floating point source data must be in IEEE754 format.) Source (32-bit floating-point data) Result (32-bit floating-point data) Specify the desired angle (–65,535 to 65,535) in radians in S+1 and S.
Page 663: Arc Sine: Asin(463)
Calculates the arc sine of a 32-bit floating-point number and places the result in the specified result words. (The arc sine function is the inverse of the sine function; it returns the angle that produces a given sine value between –1 and...
Page 664 1.0, an error will occur and the instruction will not be executed. The result is output to words R+1 and R as an angle (in radians) within the range of – /2 to /2. The following diagram shows the relationship between the input data and result.
Page 665: Arc Cosine: Acos(464)
Section 3-15 Floating-point Math Instructions Precautions The source data in S+1 and S must be in IEEE754 floating-point data format. 3-15-18 ARC COSINE: ACOS(464) Purpose Calculates the arc cosine of a 32-bit floating-point number and places the result in the specified result words. (The arc cosine function is the inverse of the cosine function;...
Page 666 1.0, an error will occur and the instruction will not be executed. The result is output to words R+1 and R as an angle (in radians) within the range of 0 to . The following diagram shows the relationship between the input data and result.
Page 667: Arc Tangent: Atan(465)
Purpose Calculates the arc tangent of a 32-bit floating-point number and places the result in the specified result words. (The arc tangent function is the inverse of the tangent function; it returns the angle that produces a given tangent value.)
Page 668 Source (32-bit floating-point data) Result (32-bit floating-point data) The result is output to words R+1 and R as an angle (in radians) within the range of – /2 to /2. The following diagram shows the relationship between the input data and result.
Page 669: Square Root: Sqrt(466)
Section 3-15 Floating-point Math Instructions 3-15-20 SQUARE ROOT: SQRT(466) Purpose Calculates the square root of a 32-bit floating-point number and places the result in the specified result words. Ladder Symbol SQRT(466) S: First source word R: First result word Variations...
Page 670 Floating-point Math Instructions Description SQRT(466) calculates the square root of the 32-bit floating-point number in S+1 and S and places the result in R+1 and R. (The floating point source data must be in IEEE754 format.) Source (32-bit floating-point data) Result (32-bit floating-point data) The source data must be positive;...
Page 671: Exponent: Exp(467)
Section 3-15 Floating-point Math Instructions 3-15-21 EXPONENT: EXP(467) Purpose Calculates the natural (base e) exponential of a 32-bit floating-point number and places the result in the specified result words. Ladder Symbol EXP(467) S: First source word R: First result word...
Page 672 Description EXP(467) calculates the natural (base e) exponential of the 32-bit floating- point number in S+1 and S and places the result in R+1 and R. In other words, EXP(467) calculates e (x = source) and places the result in R+1 and R.
Page 673: Logarithm: Log(468)
Section 3-15 Floating-point Math Instructions 3-15-22 LOGARITHM: LOG(468) Purpose Calculates the natural (base e) logarithm of a 32-bit floating-point number and places the result in the specified result words. Ladder Symbol LOG(468) S: First source word R: First result word...
Page 674 Source (32-bit floating-point data) Result (32-bit floating-point data) The source data must be positive; if it is negative, an error will occur and the instruction will not be executed. If the absolute value of the result is greater than the maximum value that can...
Page 675: Exponential Power: Pwr(840)
Section 3-15 Floating-point Math Instructions 3-15-23 EXPONENTIAL POWER: PWR(840) Purpose Raises a 32-bit floating-point number to the power of another 32-bit floating- point number. Ladder Symbol PWR(840) B: First base word E: First exponent word R: First result word Variations...
Page 676: Single-Precision Floating-Point Comparison Instructions
If the absolute value of the result is greater than the maximum value that can be expressed as floating-point data, the Overflow Flag will turn ON. If the absolute value of the result is less than the minimum value that can be expressed as floating-point data, the Underflow Flag will turn ON.
Page 677 ON execution condition when the comparison condition is true. When the data is stored in words, S and S specify the first of two words containing the 32- bit data. It is also possible to input the floating-point data as an 8-digit hexa- decimal constant.
Page 678 Section 3-15 Floating-point Math Instructions Inputting the Instructions The input comparison instructions are treated just like the LD, AND, and OR instructions to control the execution of subsequent instructions. Input type Operation The instruction can be connected directly to the left bus bar.
Page 679 D00101, D00100 is less than that of D00201, D00200, execu- tion proceeds to the next line and CIO 005000 is turned ON. If the content of D00101, D00100 is not less than that of D00201, D00200, execution does not proceed to the next instruction line.
Page 680: Floating-Point To Ascii: Fstr(448)
FLOATING LESS THAN Comparison (<F) S1 :D00100 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 S2 :D00200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0...
Page 681 FSTR(448) expresses the 32-bit floating-point number in S+1 and S (IEEE754-format) in decimal notation or scientific notation according to the control data in words C to C+2, converts the number to ASCII text, and out- puts the result to the destination words starting at D.
Page 682 The ASCII text is stored in D and subsequent words in the following order: leftmost byte of D, rightmost byte of D, leftmost byte of D+1, rightmost byte of D+1, etc. Decimal notation (C=0000 hex) 1.23456...
Page 683 A decimal point (ASCII: 2E hex) is added if the number fractional digits is greater than 0. Spaces (ASCII: 20 hex) are added if the integer part of the floating-point data is shorter than the integer part of the result (total number of characters - sign digit - decimal point - fractional digits - E digit).
Page 684 Decimal Notation (C = 0000 hex) • When there is no fractional part (C+2 = 0000 hex): Number of Integer Digits • When there is a fractional part (C+2 = 0001 to 0007 hex): Number of Integer Digits Fractional digits...
Page 685: Ascii To Floating-Point: Fval(449)
FSTR D00000 D00010 D00100 Conversion 1 0 1 0 1 0 0 0 0 1 1 1 0 0 1 0 D00000 0.327457 0 0 1 1 1 1 1 0 1 0 1 0 0 1 1 1 D00001...
Page 686 Conversion of ASCII text number to 32-bit floating-point data 32-bit floating-point data 1 1 1 0 1 0 0 1 0 1 1 1 1 0 0 1 123.456 1 1 0 0 0 0 1 0 1 1 1 1 0 1 1 0...
Page 687 32-bit floating-point data 32-bit floating-point data 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 1.234 10 1 1 0 0 0 0 1 0 1 1 1 1 0 1 1 0...
Page 688 Conversion D00000 2D ( ) 20 (Space) D00001 30 (0) 31 (1) 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 D00002 2E (.) 32 (2) D00003 33 (3) 34 (4) 1 0 1 1 1 1 1 1 1 0 0 1 1 1 1 0...
Page 689: Move Floating-Point (Single): Movf(469)
2D ( ) D00001 31 (1) 2E (.) 0 1 0 0 0 0 1 0 1 0 1 0 1 1 1 1 D00002 32 (2) 33 (3) 1 0 1 1 1 1 0 0 0 1 0 0 1 0 1 0...
Page 690 Precautions When MOVF(469) is executed, the Error Flag is turned OFF. If the source data in S+1 and S is 0, the Equals Flag is turned ON. If the source data is non-zero, the Equals Flag is turned OFF. If the source data in S+1 and S is negative, the Negative Flag is turned ON.
Page 691: Double-Precision Floating-Point Instructions (Cs1-H, Cj1-H, Cj1M, Or Cs1D Only)
Comparison Instructions =D, <>D, <D, <=D, >D, or >=D Data Format Floating-point data expresses real numbers using a sign, exponent, and man- tissa. When data is expressed in floating-point format, the following formula applies. e–1,023 Real number = (–1) (1.f)
Page 692 4847 3231 1615 It is not necessary for the user to be aware of the IEEE754 data format when reading and writing double-precision floating-point data. It is only necessary to remember that double-precision floating point values occupy four words each.
Page 693 Example 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0...
Page 694 0.0. Infinity Values of + and – can be expressed by setting the sign to 0 for positive or 1 for negative. The exponent will be 2,047 (2 – 1) and the mantissa will be 0.
Page 695 A (x,y). r = re In this example, the 4-digit BCD angle ( , in degrees) is read from D00000 and the 4-digit BCD distance (r) is read from D01000. A (x, y) = A (rcos , rsin ) •...
Page 696 4116 59CF 3.4202015399933 4022 CB39 3.4202014332567 E973 5C32 405A E495 9.3969259262085 400B 5C92 9.3969262078591 91AC 8EEB Comparison of the Calculation Results When the real-number results are compared, it is clear that the double-preci- sion calculation yields a more accurate result.
Page 697: Double Floating To 16-Bit: Fixd(841)
3-16-1 DOUBLE FLOATING TO 16-BIT: FIXD(841) Purpose Converts a double-precision (64-bit) floating-point value to 16-bit signed binary data and places the result in the specified result word. This instruction is supported by CS1-H, CJ1-H, CJ1M, and CS1D CPU Units only. Ladder Symbol FIXD(841)
Page 698: Double Floating To 32-Bit: Fixld(842)
Floating-point data (64 bits) Signed binary data (16 bits) Only the integer portion of the floating-point data is converted, and the fraction portion is truncated. The integer portion of the floating-point data must be within the range of –32,768 to 32,767.
Page 699 Label Operation Error Flag ON if the data in words S to S+3 is not a number (NaN). ON if the integer portion of words S to S+3 is not within the range of –2,147,483,648 to 2,147,483,647. OFF in all other cases.
Page 700: 16-Bit To Double Floating: Dbl(843)
Double-precision Floating-point Instructions (CS1-H, CJ1-H, CJ1M, or CS1D Only) Precautions The content of words S to S+3 must be floating-point data and the integer por- tion must be in the range of –2,147,483,648 to 2,147,483,647. 3-16-3 16-BIT TO DOUBLE FLOATING: DBL(843)
Page 701: 32-Bit To Double Floating: Dbll(844)
D+2CH D+1CH Floating-point data (64 bits) Only values within the range of –32,768 to 32,767 can be specified for S. To convert signed binary data outside of that range, use DBLL(844). Example conversions: A signed binary value of 3 is converted to 3.0.
Page 702 DBLL(844) converts the 32-bit signed binary value in S+1 and S to double- precision (64-bit) floating-point data (IEEE754-format) and places the result in words D to D+3. A single 0 is added after the decimal point in the floating- point result.
Page 703: Double Floating-Point Add: +D(845)
ON if the result is negative. OFF in all other cases. Precautions The result will not be exact if a number with an absolute value greater than 16,777,215 (the maximum value that can be expressed in 24-bits) is con- verted.
Page 704 Overflow Flag will turn ON and the result will be output as If the absolute value of the result is less than the minimum value that can be expressed as floating-point data, the Underflow Flag will turn ON and the result will be output as 0.
Page 705: Double Floating-Point Subtract: -D(846)
Negative Flag ON if the result is negative. OFF in all other cases. Precautions The augend (Au to Au+3) and Addend (Ad to Ad+3) data must be in IEEE754 floating-point data format. 3-16-6 DOUBLE FLOATING-POINT SUBTRACT: –D(846) Purpose Subtracts one double-precision (64-bit) floating-point number from another and places the result in the specified destination words.
Page 706 –D(846) subtracts the double-precision (64-bit) floating-point number in words Su to Su+3 from the double-precision (64-bit) floating-point number in Mi to Mi+3 and places the result in words D to D+3. (The floating point data must be in IEEE754 format.)
Page 707 Negative Flag ON if the result is negative. OFF in all other cases. Precautions The Minuend (Mi to Mi+3) and Subtrahend (Su to Su+3) data must be in IEEE754 floating-point data format. 3-16-7 DOUBLE FLOATING-POINT MULTIPLY: *D(847) Purpose Multiplies two double-precision (64-bit) floating-point numbers and places the result in the specified result words.
Page 708: Double Floating-Point Multiply: *D(847)
*D(847) multiplies the double-precision (64-bit) floating-point number in words Description Md to Md+3 by the double-precision (64-bit) floating-point number in words Mr to Mr+3 and places the result in words D to D+3. (The floating point data must be in IEEE754 format.) S1+3CH...
Page 709: Double Floating-Point Divide: /D(848)
Negative Flag ON if the result is negative. OFF in all other cases. Precautions The Multiplicand (Md to Md+3) and Multiplier (Mr to Mr+3) data must be in IEEE754 floating-point data format. 3-16-8 DOUBLE FLOATING-POINT DIVIDE: /D(848) Purpose Divides one double-precision (64-bit) floating-point number by another and places the result in the specified destination words.
Page 710 /D(848) divides the double-precision (64-bit) floating-point number in words Dd to Dd+3 by the double-precision (64-bit) floating-point number in words Dr to Dr+3 and places the result in words D to D+3. (The floating point data must be in IEEE754 format.)
Page 711: Double Degrees To Radians: Radd(849)
Negative Flag ON if the result is negative. OFF in all other cases. Precautions The Dividend (Dd to Dd+3) and Divisor (Dr to Dr+3) data must be in IEEE754 floating-point data format. 3-16-9 DOUBLE DEGREES TO RADIANS: RADD(849) Purpose Converts a double-precision (64-bit) floating-point number from degrees to radians and places the result in the specified result words.
Page 712 ,–(– –)IR0 to, –(– –)IR15 Description RADD(849) converts the double-precision (64-bit) floating-point number in words S to S+3 from degrees to radians and places the result in words D to D+3. (The floating point source data must be in IEEE754 format.) S+3CH...
Page 713: Double Radians To Degrees: Degd(850)
Section 3-16 Double-precision Floating-point Instructions (CS1-H, CJ1-H, CJ1M, or CS1D Only) Precautions The source data in words S to S+3 must be in IEEE754 floating-point data for- mat. 3-16-10 DOUBLE RADIANS TO DEGREES: DEGD(850) Purpose Converts a double-precision (64-bit) floating-point number from radians to degrees and places the result in the specified result words.
Page 714: Double Sine: Sind(851)
,–(– –)IR0 to, –(– –)IR15 Description DEGD(850) converts the double-precision (64-bit) floating-point number in words S to S+3 from radians to degrees and places the result in words D to D+3. (The floating point source data must be in IEEE754 format.) S+3CH...
Page 715 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15 Description SIND(851) calculates the sine of the angle (in radians) expressed as a dou- ble-precision (64-bit) floating-point value in words S to S+3 and places the result in words D to D+3.
Page 716: Double Cosine: Cosd(852)
Specify the desired angle (–65,535 to 65,535) in radians in words S to S+3. If the angle is outside of the range –65,535 to 65,535, an error will occur and the instruction will not be executed. For information on converting between degrees and radians, see 3-16-9 DOUBLE DEGREES TO RADIANS: RADD(849) or 3-16-10 DOUBLE RADIANS TO DEGREES: DEGD(850) .
Page 717 Specify the desired angle (–65,535 to 65,535) in radians in words S to S+3. If the angle is outside of the range –65,535 to 65,535, an error will occur and the instruction will not be executed. For information on converting between degrees and radians, see 3-16-9 DOUBLE DEGREES TO RADIANS: RADD(849) or 3-16-10 DOUBLE RADIANS TO DEGREES: DEGD(850) .
Page 718: Double Tangent: Tand(853)
Negative Flag ON if the result is negative. OFF in all other cases. Precautions The source data in words S to S+3 must be in IEEE754 floating-point data for- mat. 3-16-13 DOUBLE TANGENT: TAND(853) Purpose Calculates the tangent of a double-precision (64-bit) floating-point number (in radians) and places the result in the specified destination words.
Page 719 Specify the desired angle (–65,535 to 65,535) in radians in words S to S+3. If the angle is outside of the range –65,535 to 65,535, an error will occur and the instruction will not be executed. For information on converting between degrees and radians, see 3-16-9 DOUBLE DEGREES TO RADIANS: RADD(849) or 3-16-10 DOUBLE RADIANS TO DEGREES: DEGD(850) .
Page 720: Double Arc Sine: Asind(854)
Negative Flag ON if the result is negative. OFF in all other cases. Precautions The source data in words S to S+3 must be in IEEE754 floating-point data for- mat. 3-16-14 DOUBLE ARC SINE: ASIND(854) Purpose Calculates the arc sine of a double-precision (64-bit) floating-point number and places the result in the specified destination words.
Page 721 1.0, an error will occur and the instruction will not be executed. The result is output to words D to D+3 as an angle (in radians) within the range of – /2 to /2. The following diagram shows the relationship between the input data and result.
Page 722: Double Arc Cosine: Acosd(855)
Negative Flag ON if the result is negative. OFF in all other cases. Precautions The source data in words S to S+3 must be in IEEE754 floating-point data for- mat. 3-16-15 DOUBLE ARC COSINE: ACOSD(855) Purpose Calculates the arc cosine of a double-precision (64-bit) floating-point number and places the result in the specified result words.
Page 723 1.0, an error will occur and the instruction will not be executed. The result is output to words D to D+3 as an angle (in radians) within the range of 0 to . The following diagram shows the relationship between the input data and result.
Page 724: Double Arc Tangent: Atand(856)
Underflow Flag Unchanged Negative Flag Unchanged Precautions The source data in words S to S+3 must be in IEEE754 floating-point data for- mat. 3-16-16 DOUBLE ARC TANGENT: ATAND(856) Purpose Calculates the arc tangent of a double-precision (64-bit) floating-point number and places the result in the specified result words. (The arc tangent function is the inverse of the tangent function;...
Page 725 (The floating point source data must be in IEEE754 format.) –1 The result is output to words D to D+3 as an angle (in radians) within the range of – /2 to /2. The following diagram shows the relationship between the input data and result.
Page 726: Double Square Root: Sqrtd(857)
Negative Flag ON if the result is negative. OFF in all other cases. Precautions The source data in words S to S+3 must be in IEEE754 floating-point data for- mat. 3-16-17 DOUBLE SQUARE ROOT: SQRTD(857) Purpose Calculates the square root of a double-precision (64-bit) floating-point number and places the result in the specified result words.
Page 727 Description SQRTD(857) calculates the square root of the double-precision (64-bit) float- ing-point number in words S to S+3 and places the result in words D to D+3. (The floating point source data must be in IEEE754 format.) The source data must be positive; if it is negative, an error will occur and the instruction will not be executed.
Page 728: Double Exponent: Expd(858)
Underflow Flag Unchanged Negative Flag Unchanged Precautions The source data in words S to S+3 must be in IEEE754 floating-point data for- mat. 3-16-18 DOUBLE EXPONENT: EXPD(858) Purpose Calculates the natural (base e) exponential of a double-precision (64-bit) float- ing-point number and places the result in the specified result words.
Page 729 Overflow Flag will turn ON and the result will be output as If the absolute value of the result is less than the minimum value that can be expressed as floating-point data, the Underflow Flag will turn ON and the result will be output as 0.
Page 730: Double Logarithm: Logd(859)
(64-bit) floating-point value. Negative Flag Unchanged Precautions The source data in words S to S+3 must be in IEEE754 floating-point data for- mat. 3-16-19 DOUBLE LOGARITHM: LOGD(859) Purpose Calculates the natural (base e) logarithm of a double-precision (64-bit) float- ing-point number and places the result in the specified destination words.
Page 731 (64-bit) floating-point number in words S to S+3 and places the result in words D to D+3. The source data must be positive; if it is negative, an error will occur and the instruction will not be executed. If the absolute value of the result is greater than the maximum value that can...
Page 732: Double Exponential Power: Pwrd(860)
Negative Flag ON if the result is negative. OFF in all other cases. Precautions The source data in words S to S+3 must be in IEEE754 floating-point data for- mat. 3-16-20 DOUBLE EXPONENTIAL POWER: PWRD(860) Purpose Raises a double-precision (64-bit) floating-point number to the power of another double-precision (64-bit) floating-point number.
Page 733 If the absolute value of the result is greater than the maximum value that can be expressed as floating-point data, the Overflow Flag will turn ON. If the absolute value of the result is less than the minimum value that can be expressed as floating-point data, the Underflow Flag will turn ON.
Page 734: Double-Precision Floating-Point Input Instructions
Negative Flag ON if the result is negative. OFF in all other cases. Precautions The base data (B to B+3) and the exponent data (E to E+3) must be in IEEE754 floating-point data format. 3-16-21 Double-precision Floating-point Input Instructions Purpose...
Page 735 64- bit data. The 64-bit floating-point data cannot be input as constants. Inputting the Instructions The input comparison instructions are treated just like the LD, AND, and OR instructions to control the execution of subsequent instructions. Input type Operation The instruction can be connected directly to the left bus bar.
Page 736 AND DOUBLE FLOATING GREATER THAN OR EQUAL OR>=D OR DOUBLE FLOATING GREATER THAN OR EQUAL Flags In this table, C1 = content of S1 to S1+3 and C2 = content of S2 to S2+3. Name Label Operation Error Flag Greater Than >...
Page 737: Table Data Processing Instructions
D00200 to D00203, execution proceeds to the next line and CIO 005000 is turned ON. If the content of D00100 to D00103 is not less than that of D00200 to D00203, execution does not proceed to the next instruction line.
Page 738 STACK DATA DELETE SDEL All of these instructions define or operate on a group of words. The group of words in a stack are defined by SSET(630), the group of words in a record- table are defined by DIM(631), and the group of words used in a range instruction are defined independently in each instruction.
Page 739 Use the SREAD(639), SWRIT(640), SINS(641), and SDEL(642) instructions to read, overwrite, insert, and delete data elements in a stack. For example, when items are being handled on a conveyor, these instructions can add, remove, or change a data element in the stack that corresponds to an item on the conveyor.
Page 740 Table Data Processing Instructions LIFO(634) Reads the last (most recent) word of data that was stored in the stack. Decre- ments the pointer by one and reads the data at this address (the most recent data stored in the stack). The read data will not be cleared.
Page 741 SINS(641) Inserts the source data at the specified location in the stack and shifts the rest of the data in the stack downward. The offset value indicates the location of the desired word (the number of words before the current pointer position).
Page 742 Deletes the data element at the specified location in the stack and shifts the rest of the data in the stack upward. The offset value indicates the location of the desired word (the number of words before the current pointer position).
Page 743: Set Stack: Sset(630)
Operands TB through TB+3: Stack control words The first four words of the stack contain the PLC memory address of the last word in the stack and the stack pointer (the PLC memory address of the next word to be overwritten by PUSH(632)).
Page 744 The remainder of the stack is used to store data. Data storage region TB+4 TB+(N–1) Note 1. The initial value of the stack pointer is always the PLC memory address of TB+4. 2. TB and TB+(N–1) must be in the same data area. Operand Specifications Area...
Page 745 The minimum value for the number of words in the stack (N) is 5 because N includes the four words that contain the pointer to the last word in the stack and the stack pointer. An error will occur if N is not in the range 0005 to FFFF. Examples When CIO 000000 is ON in the following example, SSET(630) secures a 10- word stack from D00000 to D00009.
Page 746: Push Onto Stack: Push(632)
Operands TB through TB+3: Stack control words The first four words of the stack contain the PLC memory address of the last word in the stack and the stack pointer (the PLC memory address of the next word to be overwritten by PUSH(632)).
Page 747 (leftmost 4 digits) TB+2 Stack pointer (rightmost 4 digits) TB+3 Stack pointer (leftmost 4 digits) TB+4 through TB+(N–1): Data storage region The remainder of the stack is used to store data. TB+4 Data storage region TB+(N–1) Operand Specifications Area...
Page 748 DR0 to DR15, IR0 to IR15 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15 Description PUSH(632) writes the content of S to the address indicated by the stack pointer (TB+3 and TB+2) and increments the stack pointer by one. PLC memory address memory Write A.
Page 749: First In First Out: Fifo(633)
Last word in stack 3-17-3 FIRST IN FIRST OUT: FIFO(633) Purpose Reads the first word of data written to the specified stack (the oldest data in the stack). Ladder Symbol FIFO(633) TB: First stack address D: Destination word...
Page 750 Operands TB through TB+3: Stack control words The first four words of the stack contain the PLC memory address of the last word in the stack and the stack pointer (the PLC memory address of the next word to be overwritten by PUSH(632)).
Page 751 TB+4 is deleted. The data at the end of the stack (the address that was indicated by the stack pointer) is left unchanged.
Page 752: Last In First Out: Lifo(634)
Last word D: D00300 in stack –1 3-17-4 LAST IN FIRST OUT: LIFO(634) Purpose Reads the last word of data written to the specified stack (the newest data in the stack). Ladder Symbol LIFO(634) TB: First stack address D: Destination word...
Page 753 Operands TB through TB+3: Stack control words The first four words of the stack contain the PLC memory address of the last word in the stack and the stack pointer (the PLC memory address of the next word to be overwritten by PUSH(632)).
Page 754 Use LIFO(634) in combination with PUSH(632). After PUSH(632) has been used to write data into a stack, LIFO(634) can be used to read data from the stack on a last-in first-out basis. After data is stored by PUSH(632), the stack pointer indicates the address next to the last data.
Page 755: Dimension Record Table: Dim(631)
The content of D00006 is left unchanged. 3-17-5 DIMENSION RECORD TABLE: DIM(631) Purpose Defines the specified I/O memory area as a record table by declaring the length of each record and the number of records. Up to 16 record tables can be defined. Ladder Symbol DIM(631)
Page 756 (1 to 65,535 words). TB: First table word Indicates the first word of the table. All of the words in the table must be in the same data area. In other words TB and TB+LR NR–1 must be in the same data area.
Page 757 Depending on the settings for the record length (LR) and number of records (NR), it is possible that a single table (from TB and TB+LR NR–1) will overlap two data areas. Verify that no problems will arise before specifying a table that overlaps a data area boundary.
Page 758: Set Record Location: Setr(635)
Indicates the table number. N must be between 0 and 15. R: Record number Indicates the record number of the desired record. R must be 0000 to FFFE hexadecimal (0 to 65,534). Record numbers begin with 0, so the valid record numbers are 0 to NR–1 for a table with NR records.
Page 759 DIM(631). Examples When CIO 000000 is ON in the following example, SETR(635) finds the PLC memory address of the first word of record 3 of table number 10 and stores this address in Index Register IR11. PC memory...
Page 760: Get Record Number: Getr(636)
Section 3-17 Table Data Processing Instructions 3-17-7 GET RECORD NUMBER: GETR(636) Purpose Returns the record number of the record at the PLC memory address con- tained in the specified Index Register. Ladder Symbol GETR(636) N: Table number IR: Index Register...
Page 761 Description GETR(636) finds which record includes the PLC memory address contained in the specified Index Register and writes that record number in D. The PLC memory address contained in the Index Register does not have to be the first word in the record; it can be any word in the record.
Page 762: Data Search: Srch(181)
Note C and C+1 must be in the same data area. R1: First word in range R1 specifies the first word in the search range. The words from R1 to R1+(C– 1) are searched for the desired data. (C is the number of words set in C.) Search range R1+(C–1)
Page 763 (Cd). If a match is found, SRCH(181) writes the PLC memory address of the word to IR00 and turns the Equals Flag ON. (If there are two or more matches, just the address of the first word containing the comparison data is written to IR00.) When bit 15 of C+1 has been set to 1, SRCH(181) writes the number of matches to DR00.
Page 764 If background execution is enabled in the PLC Setup and control word C+1 is set to output the total number of matches to DR00 (C+1 = 8000 hex), the total number of matches will be output to Auxiliary Area word A597 instead of DR00.
Page 765: Swap Bytes: Swap(637)
Number of matches 00010067 0003 Number of matches If the table length is specified as &10 (10 decimal) or A hexadecimal, the num- ber of matches will not be output to the data register DR00. 3-17-9 SWAP BYTES: SWAP(637) Purpose Switches the leftmost and rightmost bytes in all of the words in the range.
Page 766 ,–(– –)IR0 to, –(– –)IR15 Description SWAP(637) switches the position of the two bytes in all of the words in the range of memory from R1 to R1+N–1. This instruction can be used to reverse the order of ASCII-code characters in each word.
Page 767: Find Maximum: Max(182)
Table Data Processing Instructions Examples When CIO 000000 is ON in the following example, SWAP(637) switches the data in the leftmost bytes with the data in the rightmost bytes in each word in the 10-word range from W000 to W009. &10...
Page 768 C000 Signed binary R1: First word in range R1 specifies the first word in the search range. The words from R1 to R1+(C– 1) are searched for the maximum value. (C is the number of words specified in Search range R1+(C–1)
Page 769 IR00.) When bit 15 of C+1 has been set to 1, MAX(182) treats the data within the range as signed binary data.
Page 770 OFF in all other cases. Precautions When bit 15 of C+1 has been set to 1, the data within the range is treated as signed binary data and hexadecimal values 8000 to FFFF are considered negative. Thus, the results of the search will differ depending on the data-type setting.
Page 771: Find Minimum: Min(183)
Finds the minimum value in the range. In CS1D CPU Units for Single-CPU Systems and CS1-H, CJ1-H, and CJ1M CPU Units, this instruction can be run in the background. Refer to the CS/CJ Series Programmable Controllers Programming Manual for details on back- ground execution.
Page 772 C specifies the number of words in the range, bit 15 of C+1 indicates whether the data will be treated as signed binary or unsigned binary, and bit 14 of C+1 indicates whether or not to output the PLC memory address of the word that contains the minimum value to IR00.
Page 773 IR00.) When bit 15 of C+1 has been set to 1, MIN(183) treats the data within the range as signed binary data.
Page 774 OFF in all other cases. Precautions When bit 15 of C+1 has been set to 1, the data within the range is treated as signed binary data and hexadecimal values 8000 to FFFF are considered negative. Thus, the results of the search will differ depending on the data-type setting.
Page 775: Sum: Sum(184)
100CF –3 D: D00300 000100CF 3-17-12 SUM: SUM(184) Purpose Adds the bytes or words in the range and outputs the result to two words. Ladder Symbol SUM(184) C: First control word R1: First word in range D: First destination word...
Page 776 C specifies the number of units (bytes or words) to be summed. (Bit 13 of C+1 determines whether bytes or words are being summed.) Bits 12 to 15 of C+1 indicate what type of data is being summed, as shown in the following diagram.
Page 777 R1 if bytes are being added. When bit 14 of C+1 has been set to 0, SUM(184) treats the data as binary. In this case, bit 15 determines whether the data is signed (bit 15 = 1) or unsigned (bit 15 = 0).
Page 778: Frame Checksum: Fcs(180)
Name Label Operation Error Flag ON if the content of C is not within the specified range of 0001 through FFFF. ON if the BCD data has been specified, but the range contains binary data. ON if the Communications Port Enabled Flag for the com-...
Page 779 When bit 13 of C+1 has been set to 1, FCS(180) calculates the FCS value for bytes of data. In this case, bit 12 determines whether the calculation starts with the rightmost byte of R1 (bit 12 = 1) or the leftmost byte of R1 (bit 12 = 0). Number of words/bytes in range...
Page 780 R1 if bytes are being added. When bit 13 of C+1 has been set to 1, FCS(180) operates on bytes of data. In this case, bit 12 determines whether the calculation starts with the rightmost...
Page 781 OFF in all other cases. Examples When CIO 000000 is ON in the following example, FCS(180) calculates the FCS value for the 10 bytes of data beginning with the rightmost byte of D00100 and writes the result to D00200. C+1: D00301 Always 0.
Page 782: Stack Size Read: Snum(638)
Operands TB through TB+3: Stack control words The first four words of the stack contain the PLC memory address of the last word in the stack and the stack pointer (the PLC memory address of the next available word in the stack.)
Page 783 SNUM(638) counts the number of data words in the specified stack from the beginning of the data region at TB+4 to the address before the one indicated by the stack pointer (TB+3 and TB+2). SNUM(638) does not change the data in the stack or the stack pointer.
Page 784: Stack Data Read: Sread(639)
When CIO 000000 is ON in the following example, SNUM(638) counts the number of words from the beginning of the data region at D00004 to the stack pointer position - 1 (D00006) and outputs the result to D00300. (In this case, the stack pointer indicates D00007.)
Page 785 Stack pointer (leftmost 4 digits) (Initial value is the leftmost 4 digits of the PLC memory address for TB+4.) TB+4 through TB+(N–1): Data storage region The remainder of the stack is used to store data. TB+4 Data storage region TB+(N–1)
Page 786 SREAD(639) can be used to read the data for an item currently on a conveyor. The position of the desired item is simply the number of items back (the offset value) from the most recent item added to the conveyor.
Page 787: Stack Data Overwrite: Swrit(640)
3-17-16 STACK DATA OVERWRITE: SWRIT(640) Purpose Writes the source data to the specified data element in the stack (overwriting the existing data). The offset value indicates the location of the desired data element (how many data elements before the current pointer position).
Page 788 Operands TB through TB+3: Stack control words The first four words of the stack contain the PLC memory address of the last word in the stack and the stack pointer (the PLC memory address of the next available word in the stack.)
Page 789 SWRIT(640) can be used to change the data for an item currently on a con- veyor. The position of the desired item is simply the number of items back (the offset value) from the most recent item added to the conveyor.
Page 790: Stack Data Insert: Sins(641)
Section 3-17 Table Data Processing Instructions case, the stack pointer indicates D00007 and the offset value is 3, so the data in D00004 is overwritten. 000000 SWRIT D00000 &3 PLC memory address D00100 D00000 PLC memory address of last word in the stack...
Page 791 Operands TB through TB+3: Stack control words The first four words of the stack contain the PLC memory address of the last word in the stack and the stack pointer (the PLC memory address of the next available word in the stack.)
Page 792 SINS(641) inserts one word of data into the stack, so there must be at least one available word at the end of the stack. If the stack is full, an error will occur and the source data will not be inserted.
Page 793: Stack Data Delete: Sdel(642)
D00000. In this case, the stack pointer indicates D00007 and the offset value is 3, so the source data is inserted in D00004. The existing data is shifted down one word and the data in D00007 is overwritten. At the same time the stack pointer will be incremented from D00007 to D00008.
Page 794 Operands TB through TB+3: Stack control words The first four words of the stack contain the PLC memory address of the last word in the stack and the stack pointer (the PLC memory address of the next available word in the stack.)
Page 795 SDEL(642) can be used to delete the data for an item that is rejected from the items on a conveyor. The position of the deletion point is simply the number of items back (the offset value) from the most recent item added to the conveyor.
Page 796 The address in the stack pointer must be greater than the PLC memory address of the beginning of the data region (TB+4). An error will occur if the stack pointer is less than the PLC memory address of TB+4, i.e., if a stack underflow error occurs.
Page 797: Data Control Instructions
Subroutines Interrupt tasks Not allowed Not allowed Parameters The following diagrams show the locations of the parameter data. For details on the parameters, refer to PID Parameter Settings in this section. Set value (SV) Proportional band (P) Integral constant (Tik)
Page 798 D. The parameters are obtained when the execution condition turns from OFF to ON, and the Error Flag will turn ON if the settings are outside of the permissi- ble range. If the settings are within the permissible range, PID processing will be exe- cuted using the initial values.
Page 799 PV input (S) Manipulated variable (D) The number of valid input data bits within the 16 bits of the PV input (S) is designated by the input range setting in C+6, bits 08 to 11. For example, if 12 bits (4 hex) is designated for the input range, the range from 0000 hex to 0FFF hex will be enabled as the PV.
Page 800 C+9 to C+38 are initialized when operation is started. If the C data is out of range, an error will occur and the Error Flag will turn ON. If the actual sampling period is more than twice the designated sampling period, an error will occur and the Error Flag will turn ON.
Page 801 The number of valid input data bits for the measured value is designated by Manipulated Variable the input range setting in C+6, bits 08 to 11, and the number of valid output Ranges data bits for the manipulated variable output is designated by the output range setting in C+6, bits 0 to 3.
Page 802 Data Control Instructions to FFFF hex for input to PID(190) and then the manipulated variable output from PID(190) is converted back to the range 0000 to 1770 hex, again using APR(069), for output from the Analog Output Unit. From Analog Input Unit...
Page 803 Not allowed PID action. (0.01 to 99.99 s, in units of 10 ms) Bits 04 to 15 2-PID parameter ( ) The input filter coefficient. Nor- 000 hex: = 0.65 of C+5 mally use 0.65 (i.e., a setting of Setting from 100 to 163 hex 000).
Page 804 Note 1. When the unit is designated as 1, the range is from 1 to 8,191 times the period. When the unit is designated as 9, the range is from 0.1 to 819.1 s. When 9 is designated, set the integral and derivative times to within a range of 1 to 8,191 times the sampling period.
Page 805 PID(190) will not be executed because 60 ms is less than 100 ms. For the second cycle, 60 ms + 60 ms is greater than 100 ms, so PID(190) will be executed. The surplus of 20 ms (i.e., 120 ms – 100 ms = 20 ms) will be carried forward.
Page 806 Combining integral action with proportional action reduces the offset accord- ing to the time that has passed, so that the PV will match the SV. The strength of the integral action is indicated by the integral time, which is the time...
Page 807 MV increases as the difference between the SV and the PV increases. • Forward action: MV is increased when the PV is larger than the SV. • Reverse action: MV is increased when the PV is smaller than the SV.
Page 808 The general relationship between PID parameters and control status is shown below. • When it is not a problem if a certain amount of time is required for stabili- zation (settlement time), but it is important not to cause overshooting, then enlarge the proportional band.
Page 809: Pid Control With Autotuning: Pidat(191)
3-18-2 PID CONTROL WITH AUTOTUNING: PIDAT(191) Purpose Executes PID control according to the specified parameters. The PID con- stants can be autotuned. This instruction is supported by CS1-H, CJ1-H, CJ1M, and CS1D CPU Units only. Ladder Symbol PIDAT(191) S: Input word...
Page 810 Section 3-18 Data Control Instructions Parameters The following diagrams show the locations of the parameter data. For details on the parameters, refer to PID Parameter Settings in this section. Set value (SV) Proportional band (P) Integral constant (Tik) Derivative constant (Tdk)
Page 811 D. The parameter settings are read when the execution condition turns from OFF to ON, and the Error Flag will turn ON if the settings are outside of the permis- sible range. If the settings are within the permissible range, PID processing will be exe- cuted using the initial values.
Page 812 P, I, and D constants are stored automatically in C+1, C+2, and C+3. At this point, the AT Command Bit (bit 15 of C+9) is turned OFF and PID control resumes with the new PID constants in C+1, C+2, and C+3.
Page 813 When changing the PID constants manually, set the PID constant change enable setting (bit 1 of C+5) to 1 so that the values in C+1, C+2, and C+3 are refreshed each sampling period in the PID calculation. This setting also allows the PID constants to be adjusted manually after autotuning.
Page 814 C+11 to C+40 are initialized when operation is started. If the C data is out of range, an error will occur and the Error Flag will turn ON. If an error occurred during autotuning, the Error Flag will turn ON.
Page 815 ON) . able output designation (Pre-Ver. later only) 4.0 operation). Bit 14 = 0 or 1 and bit 13 = 1: Bumpless operation (i.e., start from an integral manipulated variable that will not abruptly change the manipulated vari- able output and result in a con- tinuous change).
Page 816 Note 1. When the unit is designated as 1, the range is from 1 to 8,191 times the period. When the unit is designated as 9, the range is from 0.1 to 819.1 s. When 9 is designated, set the integral and derivative times to within a range of 1 to 8,191 times the sampling period.
Page 817 Data Control Instructions Section 3-18 At the rising edge of W 000000 (OFF to ON), SETB(532) turns ON bit 15 of D00209 (C+9) and starts autotuning. When autotuning is completed, the cal- culated P, I, and D constants are written to C+1, C+2, and C+3. PID control is then restarted with the new PID constants.
Page 818 Starting PIDAT(191) with first if bit 15 of D00209 (C+9) is ON. When autotuning is completed, the calcu- lated P, I, and D constants are written to C+1, C+2, and C+3. PID control is Autotuning then started with the calculated PID constants.
Page 819: Limit Control: Lmt(680)
Section 3-18 Data Control Instructions 3-18-3 LIMIT CONTROL: LMT(680) Purpose Controls output data according to whether or not input data is within upper and lower limits. Ladder Symbol LMT(680) S: Input word C: First limit word D: Output word Variations...
Page 820 Upper limit data (maximum output data) C and C+1 must have the same area classification. If the input data (S) is less than the lower limit (C), the lower limit data will be output to D and the Less Than Flag will turn ON.
Page 821: Dead Band Control: Band(681)
Data Control Instructions Precautions If the upper limit is less than the lower limit, an error will occur and the Error Flag will turn ON. If the input data (S) is greater than the upper limit, the Greater Than Flag will turn ON.
Page 822 When the execution condition is ON, BAND(681) controls output data accord- ing to whether or not the specified input data (signed 16-bit binary) is within the upper and lower limits (dead band). The contents of words C and C+1 are as follows:...
Page 823 Section 3-18 Data Control Instructions If the input data (S) is greater than or equal to the lower limit (C) and less than or equal to the upper limit (C+1), 0000 (hex) will be output to D and the Equals Flag will turn ON.
Page 824: Dead Zone Control: Zone(682)
Lower limit Lower Upper limit: limit: Upper limit 3-18-5 DEAD ZONE CONTROL: ZONE(682) Purpose Adds the specified bias to input data and outputs the result. Ladder Symbol ZONE(682) S: Input word C: First limit word D: Output word Variations Variations...
Page 825 If the input data (S) is greater than zero, the input data plus the positive bias will be output to D and the Greater Than Flag will turn ON. If the input data (S) is equal to zero, 0000 will be output to D and the Equals Flag will turn ON.
Page 826 OFF in all other cases. Precautions If the upper limit is less than the lower limit, an error will occur and the Error Flag will turn ON. If the input data (S) is greater than the upper limit, the Greater Than Flag will turn ON.
Page 827: Time-Proportional Output: Tpo(685)
Specifies the input word containing the input duty ratio or manipulated vari- able. Bits 04 to 07 of C specify the input type, i.e., whether the input word con- tains an input duty ratio or manipulated variable. (Set these bits to 0 hex to specify a input duty ratio or to 1 hex to specify a manipulated variable.)
Page 828 Note: For details, see the description of each parameter. R: Pulse Output Bit Specifies the destination output bit for the pulse output. Normally, specify an output bit allocated to a Transistor Output Unit and con- nect a solid state relay to the Transistor Output Unit. Operand Specifications...
Page 829 Example: When the control period is 1 s and the input value is 50%, the bit is ON for 0.5 s and OFF for 0.5 s. When the control period is 1 s and the input value is 80%, the bit is ON for 0.8 s and OFF for 0.2 s.
Page 830 It cannot be used by the 00 to 15 user. 00 to 15 Note When the output limit control function is enabled, set the lower and upper lim- its as follows: 0000 hex lower limit upper limit 2710 hex.
Page 831 Section 3-18 Data Control Instructions • The parameters (in C to C+3) are read in real time each time that the instruction is executed. When changing the parameters, change all of them at the same time so that different sets of parameters are not mixed.
Page 832 0.65 s Output Time If the duty ratio falls below the initial value early enough, the duty ratio will be adjusted and the output will be turned OFF sooner. Use this setting for applications such as avoiding overshooting when using time- proportional control to control heating and using a relatively long control period.
Page 833 Output Time Changes in the duty ratio are monitored in real time. If the duty ratio falls below the initial value early enough, the duty ratio will be adjusted and the output will be turned OFF sooner. If the duty ratio rises again after that, the ratio will be adjusted again and the output will be turned ON.
Page 834 CIO 000100. In this case, the control period is 1 s and the output limit function is enabled with a lower limit 20.00% and an upper limit of 80.00%.
Page 835: Scaling: Scl(194)
Executed Once for Downward Differentiation Not supported. Immediate Refreshing Specification Not supported. Applicable Program Areas Block program Step program Subroutines Interrupt tasks areas areas Operands The contents of the four words starting with the first parameter word (P1) are shown in the following diagram.
Page 836 Scaled value for point B (Br) 0000 to 9999 (4-digit BCD) P1+3 Unscaled value for point B (Bs) 0000 to FFFF (binary) Note P1 to P1+3 must be in the same area. Operand Specifications Area CIO Area CIO 0000 to CIO...
Page 837 Analog Input Units according to user-defined scale parameters. For example, if a 1 to 5-V input to an Analog Input Unit is input to memory as 0000 to 0FA0 hexadecimal, the value in memory can be scaled to 50 to 200 C using SCL(194).
Page 838 OFF in all other cases. Precautions An error will occur and the Error Flag will turn ON if the values for Ar (C) and Br (C+2) are not in BCD, or if the values for As (C+1) and Bs (C+3) are equal.
Page 839 0000 to 9999, so 0000 BCD will be output whenever the contents of D00000 is between 0000 and 00C8 hexadecimal. Reverse Scaling Reverse scaling can also be used by setting As < Bs and Ar > Br. The follow- ing relationship will result. R (unsigned BCD)
Page 840: Scaling 2: Scl2(486)
Subroutines Interrupt tasks areas areas Operands The contents of the three words starting with the first parameter word (P1) are shown in the following diagram. Offset of linear function 8000 to 7FFF (signed binary) P1+1 8000 to 7FFF (signed binary)
Page 841 The result in R will be the absolute BCD conversion value and the sign will be indicated by the Carry Flag. The result can thus be between –9999 and 9999. If the result is less than –9999, –9999 will be output as the result. If the result is greater than 9999, 9999 will be output.
Page 842 Analog Input Units according to user-defined scale parameters. For example, if a 1 to 5-V input to an Analog Input Unit is input to memory as 0000 to 0FA0 hexadecimal, the value in memory can be scaled to –100 to 200 C using SCL2(486).
Page 843 Scaling 1 to 5-V Analog Input to –200 to 200 In the following example, it is assume that an analog signal from 1 to 5 V is converted and input to CIO 2005 as 0000 to 0FA0 hexadecimal. SCL2(486) is used to convert (scale) the value in CIO 2005 to a value between –0200 and...
Page 844: Scaling 3: Scl3(487)
Step program Subroutines Interrupt tasks areas areas Operands The contents of the five words starting with the first parameter word (P1) are shown in the following diagram. Offset of linear function 8000 to 7FFF (signed binary) P1+1 0001 to 9999 (BCD)
Page 845 P1. The sign of the result is indicated by the status of the Carry Flag (ON: nega- tive, OFF: positive). Use STC(040) and CLC(041) to turn the Carry Flag ON and OFF.
Page 846 BCD or if the value for X (C+1) is not between 0001 and 9999 BCD. The Equals Flag will turn ON when the contents of the result word D is 0000. The Negative Flag will turn ON if the MSB of the result in R is 1, i.e., if the result is negative.
Page 847: Average: Avg(195)
Section 3-18 Data Control Instructions binary value of 0000 to 0FA0 for an Analog Output Unit. When CIO 000000 turns ON in the following example, the contents of D00000 is scaled using the linear function defined by X (0200), Y (0FA0), and the offset (0). These val- ues are contained in D00100 to D00102.
Page 848 S in order to words starting with R+2. The Previous Value Pointer (bits 00 to 07 of R+1) is incremented each time a value is written. Until the Nth value is written, the contents of S will be output unchanged to R and the Average Value Flag (bit 15 of R+1) will remain OFF.
Page 849 Section 3-18 Data Control Instructions turned ON. For all further cycles, the value in R will be updated for the most current N values of S. The maximum value of N is 64. If a value greater than 64 is specified, opera- tion will use a value of 64.
Page 850 R+11: CIO 0311 Examples In the following example, the content of CIO 0040 is set to #0000 and then incremented by 1 each cycle. For the first two cycles, AVG(195) moves the content of CIO 0040 to D01002 and D01003. The contents of D01001 will also change (which can be used to confirm that the results of AVG(195) has changed).
Page 851: Subroutines
Data Registers Index Registers Indirect addressing using Index Registers Note For CJ1M-CPU11 and CJ1M-CPU21 CPU Units, the range is &0 to &255 dec- imal. Description SBS(091) calls the subroutine with the specified subroutine number. The sub- routine is the program section between SBN(092) and RET(093). When the...
Page 852 RET(093)) Program end Subroutines can be nested up to 16 levels. Nesting is when another subrou- tine is called from within a subroutine program, such as shown in the following example, which is nested to 3 levels. SBN 10 SBN 11...
Page 853 CIO 000100 is turned ON by DIFU(013) when CIO 000001 has gone from OFF to ON. If CIO 000001 is ON in the same cycle, subroutine 0001 will be executed again but this time DIFU(013) will turn CIO 000100 OFF without checking the status of CIO 000001.
Page 854 Output CIO 000100 is turned ON by DIFU(013) when CIO 000001 has gone from OFF to ON. If CIO 000000 is OFF in the following cycle, subroutine 0001 will not be executed again and output CIO 000100 will remain ON.
Page 855 A S B Example 2: Sequential (Non-nested) Subroutines When CIO 000000 is ON in the following example, subroutine 1 is executed and program execution returns to the next instruction after SBS(091) 1. When CIO 000001 is ON, subroutine 2 is executed and program execution returns...
Page 856 Example 3: Nested Subroutines When CIO 000000 is ON in the following example, subroutine 1 is executed. If CIO 000001 is ON, subroutine 2 is executed from within subroutine 1 and program execution returns to the next instruction after SBS(091) 2 when sub- routine 2 is completed.
Page 857: Macro: Mcro(099)
Subroutine 2 3-19-2 MACRO: MCRO(099) Purpose Calls the subroutine with the specified subroutine number and executes that program using the input parameters in S to S+3 and the output parameters in D to D+3. Ladder Symbol MCRO(099) N: Subroutine number...
Page 858 DR0 to DR15, IR0 to IR15, IR0+(++) to IR015+(++) ,–(– –)IR0 to, –(– –)IR15 Note For CJ1M-CPU11 and CJ1M-CPU21 CPU Units, the range is 0 to 255 deci- mal. Description MCRO(099) calls the subroutine with the specified subroutine number just like SBS(091).
Page 859 The four words of input data (words or bits) in A600 to A603 and the four words of output data (words or bits) in A604 to A607 must be used in the sub- routine called by MCRO(099). It is not possible to pass more than four words of data.
Page 860 The second MCRO(099) instruction operates in the same way, but the input data in CIO 0200 to CIO 0203 is passed to A600 to A603 and the output data in A604 to A607 is passed to CIO 0400 to CIO 0403.
Page 861: Subroutine Entry: Sbn(092)
SBN(092) indicates the beginning of the subroutine with the specified subrou- tine number. The end of the subroutine is indicated by RET(093). The region of the program beginning at the first SBN(092) instruction is the subroutine region. A subroutine is executed only when it has been called by...
Page 862 NOP(000). Place the subroutines after the main program and just before the END(001) instruction in the program for each task. If part of the main program is placed after the subroutine region, that program section will be ignored. Subroutine region...
Page 863 The step instructions, STEP(008) and SNXT(009) cannot be used in subrou- tines. Not allowed Example When CIO 000000 is ON in the following example, subroutine 10 is executed and program execution returns to the next instruction after the SBS(091) or MCRO(099) instruction that called the subroutine. Subroutine 10...
Page 864: Subroutine Return: Ret(093)
SBS(091) or MCRO(099) instruction that called the subroutine. When the subroutine has been called by MCRO(099), the out- put data in A604 through A607 is written to D through D+3 before program execution is returned.
Page 865 The global subroutine region (between GSBN(751) and GRET(752)) must be defined in interrupt task 0. If it is defined in another task, an error will occur and the Error Flag will be turned ON when the GSBS(750) instruction is exe- cuted.
Page 866 Cyclic or interrupt task Cyclic or interrupt task condition ON condition ON 000000 000001 GSBS GSBS Main program Interrupt task 0 GSBN Global subroutine program (GSBN(751) to GRET(752)) GRET Multiple global subroutine regions (GSBN(751) to GRET(752)) can be defined in interrupt task 0.
Page 867 The operation of differentiated instructions in a global subroutine is unpredict- able if a subroutine is executed more than once in the same cycle. In the fol- lowing example, global subroutine 0001 is executed when CIO 000000 is ON...
Page 868 CIO 000100 is turned ON by DIFU(013) when CIO 000001 has gone from OFF to ON. If CIO 000001 is ON in the same cycle, global subroutine 0001 will be executed again but this time DIFU(013) will not detect the rising edge of CIO 000001 and CIO 000100 will be turned OFF.
Page 869 GLOBAL SUBROUTINE RETURN instruction, GRET(752) must be programmed in interrupt task 0. If the global subroutine region is not pro- grammed in interrupt task 0, an error will occur and the Error Flag will be turned ON when the GSBS(750) instruction is executed.
Page 870 Interrupt task 0 GSBN Global subroutine program S GRET Example 2 Two or more global subroutine programs can be programmed in interrupt task 0. In this case, interrupt task 0 can be divided and used as the subroutine function’s task.
Page 871 Section 3-19 Subroutines When CIO 000000 is ON, global subroutine program 1 is executed. When CIO 000001 is ON, global subroutine program 2 is executed. Cyclic or interrupt task 000000 GSBS CIO 000000 ON 000001 CIO 000001 CIO 000001 ON...
Page 872: Global Subroutine Entry: Gsbn(751)
Data Registers Index Registers Indirect addressing using Index Registers Note For CJ1M-CPU11 and CJ1M-CPU21 CPU Units, the range is 0 to 255 deci- mal. Description GSBN(751) indicates the beginning of the global subroutine with the specified subroutine number. The end of the subroutine is indicated by GRET(752).
Page 873 The global subroutine region (between GSBN(751) and GRET(752)) must be defined in interrupt task 0. If it is defined in another task, an error will occur and the Error Flag will be turned ON when the GSBS(750) instruction is exe- cuted.
Page 874 CX-Programmer and 0000 to 1023 on a Programming Console. • Always place the global subroutines in interrupt task 0. An error will occur if a global subroutine is called and the subroutine is not in interrupt task 0. Not allowed...
Page 875: Global Subroutine Return: Gret(752)
Section 3-19 Subroutines Example When CIO 000000 is ON in the following example, global subroutine 10 is executed and program execution returns to the next instruction after the GSBS(750) instruction that called the subroutine. Cyclic or interrupt task 000000 GSBS...
Page 876: Interrupt Control Instructions
• The same Special I/O Unit’s data area is read by IORD(222) or written by IOWR(223). Be sure that the interrupt task does not require more than 10 ms if a C200H Special I/O Unit or SYSMAC BUS Remote I/O Slave Rack is connected. If an...
Page 877 Mount the Interrupt Input Unit in the CPU Rack. If a CJ1-H CPU Unit is being used, mount the Unit in slots 0 to 4, and if a CJ1M CPU Unit is being used, slots 0 to 2. It will not be possible to start the I/O interrupt task unless the Interrupt Input Unit is mounted in one of these slots.
Page 878 Power OFF is recognized when this time plus the 0 to 10 ms (1- Detection default power OFF detection time (10 to 25 ms for AC ms units) Delay Time power supplies and 2 to 25 ms for DC power sup-...
Page 879: Set Interrupt Mask: Msks(690)
I/O interrupt tasks are masked (disabled), and the internal timers creating the timer interrupts that generate scheduled interrupt tasks are stopped. Use MSKS(690) to enable the I/O interrupts and timer interrupts, so that the corresponding interrupt tasks can be executed.
Page 880 1: Unit number 1 (interrupt tasks 116 to 131) Interrupt mask. Set to 0000 to FFFF hex. Bits 0 to 15 correspond to each interrupt task. Individual bit settings are as follows: 0: Enable (unmask) the interrupt. 1: Disable (mask) the interrupt.
Page 881 3: Unit number 1 (interrupt tasks 116 to 131) Specify either the rising or falling edge of the interrupt input signal. Set to 0000 to FFFF hex. Bits 0 to 15 correspond to each interrupt task. Individual bit settings are as follows: 0: Up-differentiation (Detect rising edge.)
Page 882 Specify the scheduled interrupt number. 14: Scheduled interrupt 0 (interrupt task 2) 15: Scheduled interrupt 1 (interrupt task 3) Note Only scheduled interrupt 0 can be used with the CJ1M-CPU11/21. Scheduled interrupt Scheduled interrupt set time time units (Set in the PLC Setup.)
Page 883 1. The CJ1M-CPU11/21 supports only one scheduled interrupt task, interrupt task 2 for scheduled interrupt 0. 2. The time unit used to set the scheduled interrupt time is set as the Sched- ule Interrupt Interval in the PLC Setup. Precautions 1.
Page 884 Label Operation Error Flag ON if N is not within the specified range of 0 to 5 (0 to 15 for the CJ1M CPU Unit’s built-in interrupt inputs). Errors when specifying I/O Interrupts: • When using C200HS-INT01 interrupt inputs, the Error Flag will go ON if C is not between 0000 and 00FF hex.
Page 885 15-second time interval for scheduled interrupt 0, and starts the in- ternal timer. (In this case, the scheduled time interval units are set to 1 ms.) 2. When W00001 goes from OFF to ON, the internal timer is stopped for...
Page 886: Read Interrupt Mask: Mskr(692)
1. Execution of MSKS(690) (Interrupt stopped) (Interrupt enabled, 15 ms) 15 ms 3-20-2 READ INTERRUPT MASK: MSKR(692) Purpose Reads the current interrupt control settings that were set with MSKS(690). Ladder Symbol MSKR(692) N: Interrupt number D: Destination word Variations Variations...
Page 887 0: Unit number 0 (interrupt tasks 100 to 115) 1: Unit number 1 (interrupt tasks 116 to 131) Range: 0000 to FFFF hex Bits 0 to 15 correspond to each interrupt task. The meaning of the individual flags is as follows: 0: Interrupt enabled (unmasked).
Page 888 2: Unit number 0 (interrupt tasks 100 to 115) 3: Unit number 1 (interrupt tasks 116 to 131) Range: 0000 to FFFF hex. Bits 0 to 15 correspond to each interrupt task. The meaning of the individual flags is as follows: 0: Up-differentiation (Detect rising edge.) 1: Down-differentiation (Detect falling edge.)
Page 889 Description MSKR(692) reads the interrupt task settings that were set with MSKS(690). The value of N specifies the interrupt task and the kind of information that will be read. 1. N = 0 to 3: Reading the Interrupt Mask Status of I/O Interrupt Tasks Reads the masked/unmasked status of the interrupt inputs specified by N, and outputs that information to the bits in D.
Page 890 1. The CJ1M-CPU11/21 supports only one scheduled interrupt task, interrupt task 2 for scheduled interrupt 0. 2. The time unit used to set the scheduled interrupt time is set as the Sched- ule Interrupt Interval in the PLC Setup. Flags...
Page 891: Clear Interrupt: Cli(691)
(Interrupt enabled, 12 ms) (Reads 12.) 24 ms 3-20-3 CLEAR INTERRUPT: CLI(691) Purpose Clears/retains recorded interrupt inputs, sets the time to the first scheduled interrupt for scheduled interrupt tasks, or clears/retains recorded high speed counter interrupts (CJ1M CPU Units only). Ladder Symbol CLI(691)
Page 892 0: Unit number 0 (interrupt tasks 100 to 115) 1: Unit number 1 (interrupt tasks 116 to 131) Set to 0000 to FFFF hex. Bits 0 to 15 correspond to each interrupt task. Individual bit settings are as follows: 0: Retain the recorded interrupt.
Page 893 (CJM1 CPU Units only). With the CJ1M, it can also be used to clear interrupts for the high-speed counters. N = 0 to 3, or 6 to 9: Clearing Interrupt Inputs...
Page 894 CLI(691) to clear the recorded interrupts before they are executed. N = 4 or 5: Setting the Time to the First Scheduled Interrupt Task When N is 4 or 5, the content of C specifies the time interval to the first sched- uled interrupt task. MSKS(690) Execution of scheduled interrupt task.
Page 895: Disable Interrupts: Di(693)
2. When W00001 goes from OFF to ON, CLI(691) sets the time to the first execution of scheduled interrupt 0 to 12 ms, and starts the internal timer. (In this case, the scheduled time interval units are set to 1 ms in the PLC Setup.)
Page 896 A503 (the Disable Set- ting for Power OFF Interrupts) is set to A5A5 hex. Even if a power interruption is detected after DI(693) has been executed, the CPU Unit will be reset after the program’s instructions have been executed in order up to EI(694) or the...
Page 897 CPU Unit is being used, the power OFF interrupt task is disabled, and A530 is set to A5A5 hex, the CPU Unit will be reset after execution of EI(694) in the event that a power interruption is detected during execution of the instructions between DI(693) and EI(694).
Page 898: Enable Interrupts: Ei(694)
OFF interrupt processing. After DI(593) has been executed, the CPU Unit will not be reset even if a power interruption is detected. The CPU Unit will be reset after all of the instruction s between DI(693) and EI(694) have been executed.
Page 899: Summary Of Interrupt Control
Enables execution of all disabled interrupt tasks. Note When the power OFF interrupt task is disabled for a CS1-H, CJ1-H, CJ1M CPU Unit, or CS1D CPU Unit for Single-CPU System, power OFF processing will also be enabled at the same time.
Page 900 Units 0 to 3 and numbers 4 and 5 indicate scheduled interrupts 2 and 3. I/O Interrupt Processing (N=0 to 3) An I/O interrupt is caused by an input signal from an Interrupt Input Unit. Up to four Interrupt Input Units can be connected to the PLC. Unit numbers 0 to 3 are assigned to the Units based on their position in the PLC from left to right.
Page 901 CLI(691) is executed. Interrupt inputs 0 and 3 are retained and input 1 is cleared. If interrupt inputs 0 through 3 all go ON and CLI(691) is not executed, all of the inputs will be recorded and the interrupt tasks will be executed in order after interrupt task 3 is completed.
Page 902 Scheduled Interrupt Processing (N=4 or 5) A scheduled interrupt is repeated at regular intervals set with MSKS(690) and independent of the timing of the PLC cycle. N numbers 4 and 5 correspond to scheduled interrupt numbers 2 and 3, respectively.
Page 903 ON Flag at startup 1,2,3... 1. The time to the first scheduled interrupt is set to 20 ms with CLI(691). 2. The scheduled time interval is set to 100 ms and execution of scheduled interrupt 2 is enabled with MSKS(690).
Page 904: High-Speed Counter/Pulse Output Instructions
Section 3-21 High-speed Counter/Pulse Output Instructions long time are being used; it can also cause errors in timers (TIM and TIMH) and data tracing. Be particularly careful when the scheduled time interval units are set to 0.5 ms or 1 ms in the PLC Setup.
Page 905 NV and NV+1 contain the new PV when changing the PV. If C is 0002 hex (i.e., when changing a PV), NV and NV+1 contain the new PV. Any values in NV and NV+1 are ignored when C is not 0002 hex.
Page 906 IR15 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15 Description INI(880) performs the operation specified in C for the port specified in P. The possible combinations of operations and ports are shown in the following table. P: Port specifier C: Control data...
Page 907 If C is 0001 hex, INI(880) stops comparison of a high-speed counter’s PV to the comparison table registered with CTBL(882). ■ Changing a PV (C = 0002 hex) If C is 0002 hex, INI(880) changes a PV as shown in the following table. Port and mode Operation...
Page 908: High-Speed Counter Pv Read: Prv(881) (Cj1M-Cpu21/22/23 Only)
ON if a value that is out of range is specified as the PV for an interrupt input in counter mode. ON if INI(880) is executed in an interrupt task for a high- speed counter and an interrupt occurs when CTBL(882) is executed.
Page 909 Section 3-21 High-speed Counter/Pulse Output Instructions • Range comparison results • Pulse output frequency of pulse output 0 or pulse output 1 (Supported only by CJ1M CPU Units Ver. 2.0 or later.) • High-speed counter frequency for high-speed counter input 0.
Page 910 1-s sampling method for high fre- quency (supported only by CJ1M CPU Units Ver. 3.0 or later) D: First Destination Word The PV is output to D or to D and D+1. Lower word of PV Upper word of PV 2-word PV...
Page 911 ,IR0+(++) to ,IR15+(++) ,–(– –)IR0 to, –(– –)IR15 Description PRV(881) reads the data specified in C for the port specified in P. The possi- ble combinations of data and ports are shown in the following table. P: Port specifier C: Control data...
Page 912 ■ Reading Pulse Output or High-speed Counter Frequency (C = 00@3 hex) If C is 00@3 hex, PRV(881) reads the frequency being output from pulse out- put 0 or 1 or the frequency being input to high-speed counter 0 and stores it in D and D+1.
Page 913 00030D40 hex. Pulse Frequency Calculation Methods When the CPU Unit is a CJ1M CPU Unit with version number 3.0 or later, there are two ways to calculate the frequency of pulses output from pulse out- put 0 or 1 or pulses input to high-speed counter 0.
Page 914: Counter Frequency Convert: Prv2(883)
Precautions If the counter is reset when P is 0010 hex (high-speed counter 0) and C is 0013, 0023, or 0033 hex (sampling method for high frequency), the data read during the sampling time when the counter was reset will not be dependable.
Page 915 Converts frequency to rotation speed. (See note.) 0001 hex Converts counter PV to total number of revolutions. Note The second digit of C (@) specifies the units and the third digit (*) specifies the frequency calculation method. C1 0 Conversion Type...
Page 916 C1 and the pulses/revolution coefficient specified in C2, and outputs the result to D and D+1. Select one of the following conversion methods by setting C1 to 0000 hex or 0001 hex. Converting Frequency to Rotation Speed (C1 = 0@*0 hex) If C1 is 0@*0 hex, PRV2(883) calculates the rotation speed (r/min) from the frequency data and pulses/revolution setting.
Page 917 00030D40 hex.) 2. Frequency Calculation Method When the CPU Unit is a CJ1M CPU Unit with version number 3.0 or later, there are two ways to calculate the frequency of pulses input to high-speed counter 0.
Page 918: Register Comparison Table: Ctbl(882) (Cj1M-Cpu21/22/23 Only)
Pulses per revolution D00200 ■ Example 2 When CIO 000100 is ON in the following programming example, PRV2(883) reads the counter PV, converts that value to number of revolutions, and out- puts the hexadecimal result to D00301 and D00300. 000100 PRV2...
Page 919 For range comparison, the comparison table always contains eight ranges. The table is 40 words long, as shown below. If it is not necessary to set eight ranges, set the interrupt task number to FFFF hex for all unused ranges.
Page 920 0000 to 00FF hex: Interrupt task number 0 to 255 AAAA hex: Do not execute interrupt task. FFFF hex: Ignore the settings for this range. Note Always set the upper limit greater than or equal to the lower limit for any one range. Operand Specifications Area CIO Area...
Page 921 • The range comparison table contains 8 ranges, each of which is defined by a lower limit and an upper limit. If a range is not to be used, set the interrupt task number to FFFF hex to disable the range.
Page 922: Speed Output: Sped(885) (Cj1M-Cpu21/22/23 Only)
• If there is no reason to execute an interrupt task, specify AAAA hex as the interrupt task number. The range comparison results can be read with PRV(881) or using the Range Comparison In-progress Flags. Note An error will occur if the upper limit is less than the lower limit for any one range. Flags...
Page 923 1 hex: Pulse + direction Always 0 hex. Note: Use the same pulse output method when using both pulse outputs 0 and 1. F: First Pulse Frequency Word The value of F and F+1 sets the pulse frequency in Hz.
Page 924 SPED(885) starts pulse output on the port specified in P using the method specified in M at the frequency specified in F. Pulse output will be started each time SPED(885) is executed. It is thus normally sufficient to use the differenti- ated version (@SPED(885)) of the instruction or an execution condition that is turned ON only for one scan.
Page 925 Section 3-21 High-speed Counter/Pulse Output Instructions Note Pulse output will stop immediately if the CPU Unit is changed to PROGRAM mode. Operation Purpose Application Frequency changes Description Procedure/ instruction Starting To output Changing the Outputs pulses at a SPED(885) (Con-...
Page 926 Section 3-21 High-speed Counter/Pulse Output Instructions 4. The direction set in the SPED(885) operand will be ignored if the number of pulses is set with PULS(881) as an absolute value. Operation Purpose Application Frequency changes Description Procedure/ instruction Starting To output...
Page 927: Set Pulses: Puls(886) (Cj1M-Cpu21/22/23 Only)
When CIO 000000 turns ON in the following programming example, PULS(886) sets the number of output pulses for pulse output 0. An absolute value of 5,000 pulses is set. SPED(885) is executed next to start pulse output using the CW/CCW method in the clockwise direction in independent mode at a target frequency of 500 Hz.
Page 928 Subroutines Interrupt tasks Operands P: Port Specifier The port specifier indicates the port. The parameters set in D and N will apply to the next SPED(885) or ACC(888) instruction in which the same port output location is specified. Port 0000 hex...
Page 929 • The direction set for SPED(885) or ACC(888) will be ignored if the num- ber of pulses is set with PULS(881) as an absolute value. • It is possible to move outside of the range of the PV of the pulse output amount ( 2,147,483,648 to 2,147,483,647).
Page 930: Pulse Output: Pls2(887) (Cj1M-Cpu21/22/23 Only)
1 hex: Absolute pulses Direction 0 hex: CW 1 hex: CCW Pulse output method (See note.) 0 hex: CW/CCW 1 hex: Pulse + direction Always 0 hex. Note: Use the same pulse output method when using both pulse outputs 0 and 1.
Page 931 Section 3-21 High-speed Counter/Pulse Output Instructions S: First Word of Settings Table The contents of S to S+5 control the pulse output as shown in the following diagrams. 1 to 2,000 Hz (0001 to 07D0 hex) Acceleration rate 1 to 2,000 Hz (0001 to 07D0 hex)
Page 932 PLS2(887) starts pulse output on the port specified in P using the mode spec- ified in M at the start frequency specified in F (1 in diagram). The frequency is increased every pulse control period (4 ms) at the acceleration rate specified in S until the target frequency specified in S is reached (2 in diagram).
Page 933 Section 3-21 High-speed Counter/Pulse Output Instructions ■ Independent Mode Positioning Note Pulse output will stop immediately if the CPU Unit is changed to PROGRAM mode. Opera- Purpose Application Frequency changes Description Procedure/ tion instruction PLS2(887) Start- Complex Positioning with Accelerates and decel-...
Page 934 Pulse number of direction positioning ing with absolute pulse frequency PLS2(887) pulses specification to change Change of direction at the to absolute pulses and PULS(886) Target specified deceleration rate reverse direction. frequency Number of pulses ACC(888) (position) changed...
Page 935 High-speed Counter/Pulse Output Instructions Note Triangular Control If the specified number of pulses is less than the number required to reach the target frequency and return to zero, the function will automatically reduce the acceleration/deceleration time and perform triangular control (acceleration and deceleration only.) An error will not occur.
Page 936: Acceleration Control: Acc(888) (Cj1M-Cpu21/22/23 Only)
100,000 pulses. Pulse output is accelerated at a rate of 500 Hz every 4 ms starting at 200 Hz until the target speed of 50 kHz is reached. From the deceleration point, the pulse output is decelerated at a rate of 250 Hz every 4 ms starting until the starting speed of at 200 Hz is reached, at which point pulse output is stopped.
Page 937 1 hex: Pulse + direction Always 0 hex. Note: Use the same pulse output method when using both pulse outputs 0 and 1. S: First Word of Settings Table The content of S to S+2 controls the pulse output as shown in the following diagrams.
Page 938 ACC(888) starts pulse output on the port specified in P using the mode speci- fied in M using the target frequency and acceleration/deceleration rate speci- fied in S. The frequency is increased every pulse control period (4 ms) at the acceleration rate specified in S until the target frequency specified in S is reached.
Page 939 Section 3-21 High-speed Counter/Pulse Output Instructions ■ Continuous Mode Speed Control Pulse output will continue until it is stopped from the program. Note Pulse output will stop immediately if the CPU Unit is changed to PROGRAM mode. Operation Purpose Application...
Page 940 S and when that point is reached, the frequency is decreased every pulse control period (4 ms) at the deceleration rate specified in S until the specified number of points has been output, at which point pulse output is stopped.
Page 941 Note Triangular Control If the specified number of pulses is less than the number required to reach the target frequency and return to zero, the function will automatically reduce the acceleration/deceleration time and perform triangular control (acceleration...
Page 942 CW/CCW method. Pulse output is accelerated at a rate of 20 Hz every 4 ms until the target frequency of 500 Hz is reached. When CIO 000001 turns ON, ACC(888) changes to an acceleration rate of 10 Hz every 4 ms until the target frequency of 1,000 Hz is reached.
Page 943: Origin Search: Org(889) (Cj1M-Cpu21/22/23 Only)
0 hex: CW/CCW 1 hex: Pulse + direction Mode 0 hex: Origin search 1 hex: Origin return Note: Use the same pulse output method when using both pulse outputs 0 and 1. Operand Specifications Area CIO Area Work Area Holding Bit Area...
Page 944 Origin Proximity Input Signal Type Origin Input Signal Type An origin search or origin return is started each time ORG(889) is executed. It is thus normally sufficient to use the differentiated version (@ORG(889)) of the instruction or an execution condition that is turned ON only for one scan.
Page 945 (3 in diagram). The decelera- tion point is calculated from the number of pulses remaining to the origin and the deceleration rate and when that point is reached, the pulse output is...
Page 946: Pulse With Variable Duty Factor: Pwm(891) (Cj1M-Cpu21/22/23 Only)
ORG(889) starts an origin return operation for pulse output 0 by outputting pulses using the CW/CCW method. According to the PLC Setup, the initial speed is 100 pps, the target speed is 200 pps, and the acceleration and deceleration rates are 50 Hz/4 ms.
Page 947 F specifies the frequency of the pulse output between 0.1 and 6,553.5 Hz (0.1 Hz units, 0001 to FFFF hex). The accuracy of the PMW(891) waveform that is actually output (ON duty +5%/ 0%) applies only to 0.1 to 1,000.0 Hz due to limitations in the output circuits.
Page 948: Step Instructions
Example When CIO 000000 turns ON in the following programming example, PWM(891) starts pulse output from pulse output 0 at 200 Hz with a duty factor of 50%. When CIO 000001 turns ON, the duty factor is changed to 25%.
Page 949: Step Define And Step Start: Step(008)/Snxt(009)
It defines the start of each process and specified the control bit for it. It is also placed at the end of the step programming area after the last SNXT(009) to indicate the end of the step programming area. When it appears at the end of the step programming area, STEP(008) does not take a control bit.
Page 950 Step Instructions When defining the beginning of a step, a control bit is specified as follows: STEP(008) B: Bit When defining the end of a step a control bit is not specified as follows: STEP(008) Variations Variations Executed Each Cycle for ON Condition...
Page 951 When SNXT(009) is placed at the very end of the step programming area, it ends step execution and turns OFF the previous control bit. The control bit specified for B is a dummy bit. This bit will however be turned ON, so be sure to select a bit that will not cause problems.
Page 952 Input SNXT(009) at the end of the step programming area and make sure that the control bit is a dummy bit in the Work Area. If a control bit for a step is used in the last SNXT(009) in the step programming area, the corresponding step will be started when SNXT(009) is executed.
Page 953 Be sure that two steps are not executed during the same cycle. Instructions that Cannot be Used Within Step Programs The instructions that cannot be used within step programs are listed in the fol- lowing table. Function...
Page 954 Section 3-22 Step Instructions Step a starts when C turns ON A executed When d turns ON, b starts (A is interlocked) B executed e turns ON (B is interlocked) End of step programming area Normal ladder Returns to normal ladder program...
Page 955 CIO 00000 turns ON, step W00000 starts Step W00000 starts from the next instruction Step W00000 Step (A) ladder program W00000 turns OFF, W00001 turns ON and step W00001 starts Step W00001 starts from the next instruction Step (B) ladder program Step W00001...
Page 956 Step (A) ladder program Step W00001 (B) Step (B) ladder program Step W00002 (C) Step (C) ladder program Branching Control 000001 (Step (A) 000002 (Step (B) starting condition) starting condition) Step (A) W00000 Step (B) W00001 000003 (Step (A) →...
Page 957 This is not picked up as an error in the program check using the CX-Program- mer. A duplicate bit error will only occur in a step ladder program only when a control bit in a step instructions is also used in the normal ladder diagram.
Page 958 000003 (Step (C) → Step (D) Step (B) transition transition condition) condition) Step (B) W00001 Step (D) W00002 000004 (When both Step (B) and Step (D) are complete, moves to Step (E) Step (E) W00004 000005 (Step (C) reset conditions)
Page 959 Section 3-22 Step Instructions Step W00000 (A) Step (A) ladder program Step W00001 Step (B) ladder program Step W00002 (C) Step (C) ladder program Step W00003 Step (D) ladder program Step (E) ladder program Step W00004...
Page 960 Sequential Execution and inspection/discharge, be executed in sequence with each process being reset before continuing on the next process. Various sensors (SW1, SW2, SW3, and SW4) are positioned to signal when processes are to start and end. Robot hand Solenoid 1...
Page 961 Process C reset. Example 2: The following process requires that a product is processed in one of two ways, Branching Execution depending on its weight, before it is printed. The printing process is the same regardless of which of the first processes is used. Various sensors are posi- tioned to signal when processes are to start and end.
Page 962 Step Instructions The following diagram demonstrates the flow of processing and the switches that are used for execution control. Here, either process A or process B is used depending on the status of SW A1 and SW B1. SW B1...
Page 963 A and B. Because of the way CIO 000001 (SW A1) and CIO 000002 (SW B1) are programmed, only one of these will be executed with an ON execution condition to start either process A or process B.
Page 964 A and C. These instructions branch from the same instruction line and are always executed together, starting steps for both A and C. When the steps for both A and C have finished, the steps for process B and D begin immediately.
Page 965 000001 SNXT(009) W00000 000002 SNXT(009) W00002 000003 STEP(008) W00000 Process A 000100 000002 000101 SNXT(009) W00001 Programming for process A 000102 STEP(008) W00001 Process A Process B reset. Process B started. 000100 000003 000101 W00003 000101 000004 000101 SNXT(009)
Page 966: Basic I/O Unit Instructions
CIO 2000 to CIO 2959 (Special I/O Unit Bit Area) E: End Word CIO 0000 to CIO 0999 (I/O Bit Area) or CIO 2000 to CIO 2959 (Special I/O Unit Bit Area) Note St and E must be in the same memory area. Operand Specifications Area CIO Area...
Page 967 When refreshing is specified for words in the Special I/O Unit bit area, all 10 words allocated to the Unit will be refreshed as long as the first word of the 10 words allocated to the Unit is included in the specified range of words.
Page 968 OFF in all other cases. Precautions An error will occur if words in both the I/O Bit Area (CIO 0000 to CIO 0999) and the Special I/O Unit Bit Area (CIO 2000 to CIO 2959) are specified for the same instruction.
Page 969: Special I/O Unit I/O Refresh: Fiorf(225)
If IORF(097) or FIORF(225) is not executed within 11 seconds to refresh the Unit’s data, a CPU Unit Monitor Error will occur in the Special I/O Unit and the ERH and RUN Indicators will be lit.
Page 970 FIORF(225) performs immediate I/O refreshing of the CIO Area words and DM Area words allocated to the Special I/O Unit with the unit number speci- fied by N. Refer to the Special I/O Unit’s Operation Manual for details on the data area words that are immediately refreshed.
Page 971 • Allocated CIO Area words • Allocated DM Area words CPU Bus Units Note This table applies to Units mounted in a CPU Rack or an Expansion Rack. It does not apply to Units mounted in a SYSMAC Bus Slave Rack. Flags...
Page 972: Cpu Bus Unit I/O Refresh: Dlnk(226)
If IORF(097) or FIORF(225) is not executed within 11 seconds to refresh the Unit’s data, a CPU Unit Monitor Error will occur in the Special I/O Unit and the ERH and RUN Indicators will be lit.
Page 973 Block program areas Step program areas Subroutines Interrupt tasks Operands N: Unit number Specifies the CPU Bus Unit’s unit number (0000 to 000F hex or 0 to 15 deci- mal). Operand Specifications Area CIO Area CIO 0000 to CIO 6143...
Page 974 • I/O refreshing of the CIO words and DM words used by Special I/O Units FIORF(225) • I/O refreshing of the CIO words and DM words used by a Spe- cial I/O Unit DLNK(226) • I/O refreshing of the CS1 CPU Bus Unit Area in the CIO Area (25 words) •...
Page 975 I/O refreshing (in this case, data link refreshing within the PLC) for the CPU Bus Unit with unit number 1 (in this case, a Controller Link Unit).If I/O refreshing cannot be performed because the Controller Link Unit is refreshing data, the Equals Flag will be turned OFF causing W001 to be turned ON so that the instruction execution will be retried in the next cycle.
Page 976 Data link area Controller Link The actual timing for data link area refreshing in this example is as follows: • When transmitting: Data is transmitted over the network the next time that the token right is acquired. (The transmitted data is delayed up to 1 com- munications cycle time max.)
Page 977: 7-Segment Decoder: Sdec(078)
3-23-4 7-SEGMENT DECODER: SDEC(078) Purpose Converts the hexadecimal contents of the designated digit(s) into 8-bit, 7-seg- ment display code and places it into the upper or lower 8-bits of the specified destination words. Ladder Symbol SDEC(078) S: Source word...
Page 978 SDEC(078) regards the data specified by S as 4-digit hexadecimal data, con- verts the digits specified in S by Di (first digit and number of digits) to 7-seg- ment data and outputs the results to D in the bits specified in Di.
Page 979 Basic I/O Unit Instructions Precautions If more than one digit is specified for conversion in Di, digits are converted in order toward the most-significant digit. Digit 0 is the next digit after digit 3. Results are stored in D in order from the specified portion toward higher- address words.
Page 980: Digital Switch Input - Dsw(210)
Purpose Reads the value set on a external digital switch (or thumbwheel switch) con- nected to an I/O Unit and stores the 4-digit or 8-digit value in the specified words. This instruction is supported only by CS/CJ-series CPU Unit Ver. 2.0 or later.
Page 981 I: Input Word (Data Line D0 to D3 Inputs) Specify the input word allocated to the Input Unit and connect the digital switch’s D0 to D3 data lines to the Input Unit as shown in the following dia- gram. Leftmost 4 digits...
Page 982 (either 4-digit or 8-digit, specified in C1) of digital switch data line data from I, and stores the result in D and D+1. (If 4 digits are read, the result is stored in D. If 8 digits are read, the result is stored in D and D+1.)
Page 983 External Connections Connect the digital switch or thumbwheel switch to Input Unit contacts 0 to 7 and Output Unit contacts 0 to 4, as shown in the following diagram. The fol- lowing example illustrates connections for an A7B Thumbwheel Switch.
Page 984 DSW(210) is executed. Consequently, set the input time constant for the Input Units used for the data line input word to a value that is shorter than the cycle time, or do not connect the digital switch or thumbwheel switch to the following Units.
Page 985: Ten Key Input - Tky(211)
Section 3-23 Basic I/O Unit Instructions Since 8 digits of data are being read, C1 (D32000 in this case) is set to 0001 hex. D32001 is used as the system word. P_On DSW(210) Always ON Flag 0100 0200 D00000 D32000 D32001 3-23-6 TEN KEY INPUT –...
Page 986 (Remains on until ed. (Remains on until another key is pressed.) another key is pressed.) Note TKY(211) does not require a system word, unlike other I/O instructions such as HKY(212). Operand Specifications Area CIO Area...
Page 987 ,–(– –)IR0 to, –(– –)IR15 Description TKY(211) reads numeric data from input word I, which is allocated to a ten- key keypad connected to an Input Unit, and stores up to 8 digits of BCD data in register words D and D +1.
Page 988: Hexadecimal Key Input - Hky(212)
TKY(211) is executed. Consequently, set the input time constant for the Input Units used for the data line input word to a value that is shorter than the cycle time, or do not connect the ten-key keypad to the following Units.
Page 989 I: Input Word (Data Line D0 to D3 Inputs) Specify the input word allocated to the Input Unit and connect the hexadeci- mal keypad’s D0 to D3 data lines to the Input Unit as shown in the following diagram. Bits 00 to 03 correspond to Input Unit inputs 0 to 3.
Page 990 Specifies the leading word address where the hexadecimal keypad’s numeric input (up to 8 digits) will be stored. (In addition, each time that a key is pressed, the corresponding bit in D+2 (0 to F) will be turned ON and remains ON until another key is pressed.)
Page 991 Description HKY(212) outputs the selection signals to bits 00 to 03 of O, reads the data in order from bits 00 to 03 of I, and stores up to 8 digits of hexadecimal data in register words D and D+1.
Page 992 Input Unit The inputs and outputs can be connected to the following kinds of Basic I/O Units and High-density I/O Units as long as they are not mounted in a SYS- MAC BUS Remote I/O Rack. • DC Input Units with 8 or more input points •...
Page 993: Matrix Input: Mtr(213)
HKY(212) is executed. Consequently, set the input time constant for the Input Units used for the data line input word to a value that is shorter than the cycle time, or do not connect the hexadecimal keypad to the following Units.
Page 994 Basic I/O Unit Instructions Operands I: Input Word Specify the input word allocated to the Input Unit and connect the 8 input sig- nal lines to the Input Unit as shown in the following diagram. Bits 00 to 07 correspond to Input Unit inputs 0 to 7.
Page 995 32 to 47. Bits 00 to 15 correspond to matrix elements 48 to 63. C: System Word Specifies a work word used by the instruction. This word cannot be used in any other application. System word (Cannot be accessed by the user.)
Page 996 MTR(213) outputs the selection signals to bits 00 to 07 of O, reads the data in order from bits 00 to 07 of I, and stores the 64 bits of data in the 4 words D through D+3. MTR(213) reads the status of the 64-bit matrix every 24 CPU Unit cycles.
Page 997: 7-Segment Display Output - 7Seg(214)
Input Unit and Output Unit connected to the external matrix after MTR(213) is executed. Consequently, set the input time constant for the Input Units used for the data line input word to a value that is shorter than the cycle time, or do not connect the external matrix to the following Units.
Page 998 Step program areas Subroutines Interrupt tasks Not allowed Not allowed Operands S: Source Word Specify the first source word containing the data that will be converted to 7- segment display data. 12 11 Digit 4 Digit 2 Digit 3 Digit 1...
Page 999 Basic I/O Unit Instructions C: Control Data The value of C indicates the number of digits of source data and the logic for the Input and Output Units, as shown in the following table. (The logic refers to the transistor output’s NPN or PNP logic.) Source data Display’s data input logic...
Page 1000 7SEG(214) displays the 4-digit or 8-digit data in 12 cycles, and then starts over and continues displaying the data. The One Round Flag (bit 08 of O when converting 4 digits, bit 12 of O when converting 8 digits) is turned ON for one cycle in every 12 cycles after 7SEG(214) has turned ON each of the latch output signals.
Page 1001 Output Unit The inputs and outputs can be connected to the following kinds of Basic I/O Units and High-density I/O Units as long as they are not mounted in a SYS- MAC BUS Remote I/O Rack. • 4-digit display: Transistor Output Units with 8 or more output points •...
Page 1002: Intelligent I/O Read: Iord(222)
CS1W-OD211 16-point Transistor Output Unit. There are 8 digits of data being output and the 7-segment display’s logic is the same as the Output Unit’s logic, so the control data (C) is set to 0004. D32000 is used as the system word, D.
Page 1003 Special I/O Unit or CPU Bus Unit whose unit number is designated by S and outputs the data to D. Only Special I/O Units or CPU Bus Units mounted on CPU Racks or Expansion I/O Racks can be designated. Refer to the operation manual of the Special I/O Unit or CPU Bus Unit from which data is being read for specific details for each Unit.

This manual is also suitable for:

Sysmac cs series Sysmac one nsj series Sysmac cj series

Omron SYSMAC CJ - REFERENCE MANUAL 08-2008 Reference Manual

Table of Contents

Precautions

Operate a PLC System.

Controllers. You Must Read this Section and Understand the Information Contained before Attempting to Set up or

Section 2 Summary of Instructions

Section 3 Instructions

Quick Links

Chapters

Related Manuals for Omron SYSMAC CJ - REFERENCE MANUAL 08-2008

Summary of Contents for Omron SYSMAC CJ - REFERENCE MANUAL 08-2008