HP 70427A User Manual page 494

Block Diagram
HP 70427A Intermediate Frequency (IF) Amplifier
The IF Level output is a DC coupled voltage proportional to the IF carrier
level. The response time of this output is on the order of 20 to 30 ns, and may
be used as a pulse trigger output for pulsed noise measurements.
The IF Level amplifier is a 175 MHz, 2300 V/μs, trans- impedance Op Amp,
set for a gain of 11, and back-matched with a 50Ω resistor. The detector is
terminated in 100Ω, with an additional 5 pF of capacitance at the input of the
level Amplifier, with a detector time constant of 830 ps.
The maximum output level for linear operation of the IF level amplifier is
about +3 dBm. Operation above this level greatly decreases the op-amp rise
time and compresses the output level. Also, IF frequencies less than 300
MHz will produce excessive video feedthrough of the IF carrier at the IF
Level Output.
The level peak detector consists of a diode peak detector on the input to the
AM detector input filter. The detector rise time is about 50 ns for full output
from a single pulse, which will decay with a 33 μs time constant. The
detector output is buffered through a 7.19 gain non-inverting FET-input
operational amplifier, which is followed by a monolithic peak-hold detector.
The peak-hold detector stores the fast diode detector output until the level
can be read by the module's internal volt meter. The acquisition time of the
peak-hold detector is 2.5 μs/V. The droop rate is 15 mV/s at room
temperature
.
The internal microprocessor uses the peak-hold level to set the IF gain for an
output level of 0 dBm to +6 dBm. The IF gain setting routine is initiated by
the used with the softkey or the softkey. The
AUTO RANGE AUTO IF GAIN
auto gain setting command, initiated after a signal is present, first sets the IF
gain to minimum, and then steps the gain up in 5 dB steps until the desired
output range is achieved. The IF gain is set back to minimum if the output
level of 0 dBm to +6 dBm cannot be set. The gain can be set manually using
the softkey.
IF GAIN
The peak-hold output is also monitored by an internal comparator. The
comparator threshold corresponds to an IF output level of about 13 dBm. If
the threshold level is exceeded, the comparator output will be set 'low'. The
comparator may be read through the Diagnostic Multiplexer System.
Digital Control
The digital interface with the rest of the module is through a serial three-line
data bus. The interface is implemented using a custom I/O chip. The chip
requires a bi-directional data line, a clock line and a chip enable/interrupt
line from the microprocessor. The I/O chip generates 22 parallel outputs and
controls all the functions on the assembly. The I/O chip also latches and
transfers the interrupt status of the overload detector to the microprocessor.
HP 70427A/HP 70428A User's Guide 13-59