HP 70427A User Manual page 195

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Advanced Hardware Control
To Select a Multiplexer (Voltmeter Monitor Point)
Table 8-4
A7A1 100 MHz Reference Loop
Latch
Bit
Bit Weight
2
7
128
6 to
64 to 16
4
3 to
8 to 4
2
1
2
0
1
3
0
1
8-10 HP 70427A/HP 70428A User's Guide
Bit Mnemonic
MUX_1
100
MHz_BW_4,2,1
100MHz_TUNE_2,1
SW_+15 V
SW_–10 V
100MHz_00L_INPUT
Bit Description
*Power-on/Reset State
See latch 0, bits 1 to 0
0: 25 Hz Pll bandwidth
1: 53 Hz PLL bandwidth
*
2: 126 Hz PLL bandwidth
3: 300 Hz PLL bandwidth
4: 650 Hz PLL bandwidth
5: 1.53 kHz PLL bandwidth
6: 3.63 kHz PLL bandwidth
7: 10.4 kHz PLL bandwidth
0: Ground
1: Customer/internal tune
*
2: PLL tune line
3: Ground
* 0: 10 to 100 MHz multiplier power
on
1: 100 MHz oscillator power off
* 0: 10 to 100 MHz multiplier power
on
1: 10 to 100 MHz multiplier power off
0: 100 MHz PLL out of lock
1: 100 MHz PLL locked

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