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Block Diagram
600 MHz Reference Loop (A7A2)
The selectable PLL bandwidths range from 4 kHz to 30 kHz in an attempt to
cover all required bandwidth contingencies. The bandwidths are 4 kHz, 10
kHz, 17 kHz and 30 kHz after adjusting for component availability.
There are two primary assumptions that were made before the loop
integrator design could begin:
1. The phase detector gain is 4.25 V/rad. This is held constant by the
saturation output level of the amplifiers driving the phase detector mixer.
Given that both inputs to the phase detector (+17 dBm level) mixer is
+11 to +16 dBm, the output is a 0.5 to 0.7 V/rad phase slope into a 100Ω
termination. The output is then amplified by a variable gain amplifier.
The amplifier gain is adjusted to produce the 4.25 V/rad phase detector
gain. The low-noise amplifier is necessary to insure that the signal levels
out of the phase detector are large enough to maintain an adequate
signal-to-noise ratio, despite the added noise from the integrator and to
adjust the phase detector gain to 4.25 V/rad.
2. The STWO tuning sensitivity is 10 kHz/V. This was determined
experimentally after there was a stable 600 MHz STWO design with
adequate noise performance and tuning range. The original STWO
design goal was a 4 kHz/V tuning sensitivity.
The lead/lag filter is necessary to reduce integrator noise on the STWO's
tuning port. The contribution to phase noise from noise on the oscillator's
tuning port is:
where: V
= noise voltage
rms
k
= oscillator tuning sensitivity, and
v
F
= carrier frequency offset.
m
The first order, closed loop bandwidth is equal to the phase detector gain
times the tuning sensitivity. For example:
4.25V
-------------- -
The four different PLL bandwidths are produced by switching between four
different integrator networks with four different lead/lag filters. The
integrator and lead/lag networks are designed as matched pairs. The overall
response of each pair is an integrator with a zero. This is accomplished by
placing the integrator's zero and the lead/lag network's pole at the same
13-22 HP 70427A/HP 70428A User's Guide
20
log
V rms K
v
=
------------------------------------
L f ( )
2F m
10kHz
×
---------------- -
=
42.5kHz
rad
V
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