HP 70427A User Manual page 491

Block Diagram
HP 70427A Intermediate Frequency (IF) Amplifier
precise ±10.00 volt reference, where a DAC voltage of 2.000 volts
corresponds to a DAC number of 2000, and a 0.00 volt amplifier output.
DAC and 10.00 volt reference noise are reduced by the filter capacitor across
the feedback resistor in the difference amplifier. The capacitor introduces a
pole in the DAC noise response at 15.9 Hz. The capacitor also produces a
pole-zero response in the 10.00 volt reference noise at 15.9 Hz and 95.5 Hz
respectively.
The DAC and the 10 V reference produce about 200 nV/Hz of noise, and
contribute equally to the output noise until the amplifier zero stops the noise
roll-off at 95.5 Hz. The output noise is then dominated by the 10 V reference
beyond 100 Hz at 33 nV/Hz.
1 kΩ of resistance converts the ±10 volt output into ±10 mA of current with
respect to ground. The bias source noise is filtered by two additional poles.
The two poles are produced by breaking the 1 kΩ of resistance into three
sections. The first two sections are about 250Ω each, followed by 0.068 μF
capacitors to ground after each section. The result are two additional poles at
about 9 kHz. The final resistor section is 500Ω which is coupled to the 1.5
GHz low-pass filter section output through a 2.5 μH RF choke.
The millimeter mixer diodes must be protected against high current
capacitive discharges. A 1 μJoule energy discharge may damage or destroy
the mixer diodes. The diodes are protected by limiting the maximum bias
voltage to less than 2 volts with clamping diodes and minimizing the
coupling capacitor values.
Switched Gain Amplifiers
There are five switchable gain stages, with an overall gain of 10 dB per
stage. Each stage consists of a DPDT relay which can bypass or select the
amplifier. The thin film cascadable amplifiers have typically greater than 13
dB of gain, with a bandwidth of 0.1 MHz to 1.5 GHz. Each amplifier is
biased through a 3 dB sloped gain attenuator. The attenuators adjust for gain
roll-off at the upper frequencies, and improve the impedance match between
gain stages. The attenuators also provide a method of biasing the amplifiers
without introducing excessive loading at the upper frequencies.
The bias voltage is switched off on bypassed amplifier stages to prevent
spurious oscillations and noise peaking due to unterminated amplifiers.
Adequate bias supply bypassing is essential. There is over 60 dB of gain
available between the input of the first amplifier and the output of the last
amplifiers before the signal is split off to the various outputs. Any extraneous
feedback paths will cause gain unflatness and oscillations. The power supply
is distributed through a series of L-C low-pass networks with a cut-off
frequency of less than 800 kHz. Following the power MOS FET bias supply
switches, R-L-C low-pass networks are used to filter each of the individual
13-56 HP 70427A/HP 70428A User's Guide