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SNM-1001L Satellite Modem
Reed-Solomon Codec
15.1.4
Reed-Solomon Decoder
Refer to Figure 15-5 for a block diagram of the Reed-Solomon decoder section.
The Reed-Solomon decoder section includes the following circuits:
JP2
RXSATDAT
UNIQUE WORD
(SERIAL)
JP2
DETECTOR
RXSATCLK
The data and clock signals come from the demultiplexer on the interface PCB, and are sent to
the Reed-Solomon decoder section.
The data is sent through a serial/parallel converter. Because it was block interleaved by the
encoder, the data must pass through a de-interleaver with the same depth as the interleaver used
on the encoder. The de-interleaver is synchronized by the detection of the unique words, which
are placed at the end of each page by the interleaver on the encoder.
Once the de-interleaver is synchronized to the incoming data, the data is reassembled into its
original sequence, in accordance with the INTELSAT-308 Rev. 6B specification. The data is
then sent to the Reed-Solomon outer decoder.
Refer to Figure 15-6 for the Reed-Solomon code page format. The outer Codec reads the data in
blocks of n bytes and recalculates the check bytes that were appended by the encoder. If the
recalculated data bytes do not match the check bytes received, the Codec makes the necessary
corrections to the data within the data block. The letter n represents the total number of bytes in
a given block of data out of the Codec. The letter k represents the number of data bytes in a
given block.
•
Serial/Parallel Converter
•
RAM Deinterleaver
•
Parallel/Serial Converter
•
Reed-Solomon Codec (decoder section)
•
Synchronous Descrambler
SERIAL
TO
PARALLEL
DEINTERLEAVER
CONVERTER
U3
U3
DEINTERLEAVER
ADDRESS
GENERATOR
Figure 15-5. Reed-Solomon Decoder Section Block Diagram
RAM
RS
CODEC
(DECODER SECTION)
U2
U1
U3
RS TIMING CONTROLLER
15–5
MN/SNM1001L.OM
JP2
PARALLEL
SYNCHRONOUS
TO SERIAL
DESCRAMBLER
CONVERTER
U3
U3
JP2
U3
Revision 1
DMXDAT
(SERIAL)
DMXCLK
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