Reed-Solomon Encoder; Figure 15-3. Reed-Solomon Encoder Section Block Diagram - Comtech EF Data SNM-1001L Installation And Operation Manual

SNM-1001L Satellite Modem
Reed-Solomon Codec
15.1.3

Reed-Solomon Encoder

A block diagram of the Reed-Solomon encoder section is shown in Figure 15-3.
The Reed-Solomon encoder section includes the following circuits:
JP2
MUXDATA
(SERIAL)
SYNCHRONOUS
SCRAMBLER
JP2
MUXCLK
The data and clock signals (MUXDATA and MUXCLK) come from the multiplexer on the
main PCB, and are sent to the Reed-Solomon encoder section. Since the data input to the
Reed-Solomon encoder is serial, the data passes through a self-synchronizing serial scrambler,
in accordance with INTELSAT-308 Rev. 6B specification.
The host software allows the scrambler to be turned on or off at the front panel as required by
the user. If the scrambler is disabled, the data passes through the scrambler unaltered.
The data then passes through a serial/parallel converter, and on to a FIFO. The serial/parallel
converter changes the data to an 8-bit word. A synchronous FIFO buffers the incoming data,
because the rate is different than the encoded data rate. Once buffered by the FIFO, the data
passes to the Reed-Solomon Codec.
Refer to Figure 15-4 for the Reed-Solomon code page format. The Reed-Solomon outer Codec
reads the data in blocks of k bytes, and calculates and appends check bytes to the end data
block. The letter n represents the total number of bytes in a given block of data out of the
Codec. The letter k represents the number of data bytes in a given block.
The term, n - k = 2t, is the total number of check bytes appended to the end of the data. This is
referred to as the "Reed-Solomon overhead." The term's k, n, and t will vary, depending on the
Reed-Solomon coding used. The output data is passed to a block interleaver.
•
Synchronous Scrambler
•
Reed-Solomon Codec (encoder section)
•
Serial/Parallel Converter
•
RAM Interleaver
•
Parallel/Serial Converter
SERIAL
RS CODEC
TO PARALLEL
(ENCODER SECTION)
CONVERTER
U4
RS TIMING CONTROLLER

Figure 15-3. Reed-Solomon Encoder Section Block Diagram

UNIQUE WORD RAM
INSERTION INTERLEAVER
U3
U4
INTERLEAVER
ADDRESS
GENERATOR
U4
15–3
Revision 1
MN/SNM1001L.OM
JP2
PARALLEL
TXSATDAT
TO SERIAL
CONVERTER
TXSATCLK
U1 U4
JP2
U4