14.1
Decoder
14.1.1
Sequential Decoder
The sequential decoder is used in closed network applications, typically in Frequency Division
Multiple Access (FDMA) satellite communications systems. The sequential decoder is a FAST
option. Refer to Figure 14-1 for a block diagram of the sequential decoder.
MICRO-
COMPUTER
BUS
I CHANNEL
Q CHANNEL
Chapter 14. DECODER
MICROCOMPUTER
INTERFACE
SYNDROME INPUT
GENERATOR
AMBIGUITY
RESOLVER
INPUT
BUFFER
COST AS
PROCESSOR
VCXO
SWEEP
CLOCK
RECOVERY
Figure 14-1. Sequential Decoder Block Diagram
SYNDROME SHIFT
REGISTER A
PARITY
OUTPUT
GENERATOR
BUFFER
SYNDROME SHIFT
REGISTER B
ADDRESS
LOCK
GENERATOR
DETECT
TIMING AND
PROCESS
CONTROL
CLOCK
14–1
V .35
RECEIVE
DESCRAMBLER
DAT A
DIFFERENTIAL
DECODER
CHANNEL BER
DETECTOR
RECEIVE
CLOCK
RCVR
DDS
IF
AGC
CONTROL