ARM ARM7TDMI Technical Reference Manual page 242

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Debug in Depth
B.9.5
System speed access
B.9.6
Summary of return address calculations
B-32
0 E1A00000; MOV R0, R0
1 E1A00000; MOV R0, R0
0 EAFFFFFA; B -6
This code restores the PC and restarts the program from the next instruction.
When a system-speed access is performed during debug state, the value of the PC
increases by three addresses. System speed instructions access the memory system and
so it is possible for aborts to take place. If an abort occurs during a system-speed
memory access, the ARM7TDMI core enters abort mode before returning to debug
state.
This is similar to an aborted watchpoint, but the problem is much harder to fix because
the abort was not caused by an instruction in the main program and so the PC does not
point to the instruction that caused the abort. An abort handler usually looks at the PC
to determine the instruction that caused the abort and also the abort address. In this case,
the value of the PC is invalid, but because the debugger can determine which location
was being accessed, the debugger can be written to help the abort handler fix the
memory system.
The calculation of the branch return address is as follows:
for normal breakpoint and watchpoint, the branch is:
- (4+N+3S)
for entry through debug request (DBGRQ) or watchpoint with exception, the
branch is:
- (3+N+3S)
where N is the number of debug-speed instructions executed, including the final branch,
and S is the number of system-speed instructions executed.
Copyright © 2001, 2004 ARM Limited. All rights reserved.
ARM DDI 0210C

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