Figure 1-4 Arm7Tdmi Processor Functional Diagram - ARM ARM7TDMI Technical Reference Manual

Introduction
Clocks and
timing
Interrupts
Bus
nENOUTI
controls
ECAPCLK
BREAKPT
DBGACK
EXTERN1
EXTERN0
Debug
RANGEOUT0
RANGEOUT1
COMMRX
COMMTX
INSTRVALID
1-10
MCLK
nWAIT
ECLK
nIRQ
nFIQ
ISYNC
nRESET
BUSEN
HIGHZ
nHIGHZ
BIGEND
nENIN
nENOUT
ABE
ALE
APE
DBE
TBE
BUSDIS
DBGRQ
DBGRQ
nEXEC
DBGEN
DBGRQI
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11
ARM7TDMI

Figure 1-4 ARM7TDMI processor functional diagram

TCK
TMS
TDI
nTRST
TDO
Boundary
TAPSM[3:0]
scan
IR[3:0]
nTDOEN
TCK1
TCK2
SCREG[3:0]
Boundary scan
control signals
Processor mode
nM[4:0]
Processor state
TBIT
A[31:0]
DOUT[31:0]
D[31:0]
DIN[31:0]
nMREQ
Memory
interface
SEQ
nRW
MAS[1:0]
BL[3:0]
LOCK
Memory
nTRANS
management
ABORT
interface
VDD
Power
VSS
nOPC
Coprocessor
nCPI
interface
CPA
CPB
ARM DDI 0210C