ARM ARM7TDMI Technical Reference Manual page 5

Hide thumbs Also See for ARM7TDMI:
Table of Contents

Advertisement

Chapter 7
ARM DDI 0210C
6.14
6.15
6.16
Coprocessor register transfer, load from coprocessor .............................. 6-25
6.17
Coprocessor register transfer, store to coprocessor ................................. 6-26
6.18
Undefined instructions and coprocessor absent ....................................... 6-27
6.19
Unexecuted instructions ............................................................................ 6-28
6.20
Instruction speed summary ....................................................................... 6-29
7.1
Timing diagrams ......................................................................................... 7-2
7.2
Notes on AC parameters .......................................................................... 7-20
7.3
DC parameters .......................................................................................... 7-26
A.1
Transistor dimensions ................................................................................. A-2
A.2
Signal types ................................................................................................ A-3
A.3
Signal descriptions ...................................................................................... A-4
B.1
Scan chains and the JTAG interface .......................................................... B-3
B.2
Resetting the TAP controller ....................................................................... B-6
B.3
Pullup resistors ........................................................................................... B-7
B.4
Instruction register ...................................................................................... B-8
B.5
Public instructions ....................................................................................... B-9
B.6
Test data registers .................................................................................... B-14
B.7
The ARM7TDMI core clocks ..................................................................... B-22
B.8
Determining the core and system state in debug state ............................. B-24
B.9
Behavior of the program counter in debug state ....................................... B-30
B.10
Priorities and exceptions ........................................................................... B-33
B.11
Scan chain cell data .................................................................................. B-35
B.12
The watchpoint registers ........................................................................... B-42
B.13
Programming breakpoints ......................................................................... B-47
B.14
Programming watchpoints ......................................................................... B-50
B.15
The debug control register ........................................................................ B-51
B.16
The debug status register ......................................................................... B-54
B.17
The abort status register ........................................................................... B-56
B.18
Coupling breakpoints and watchpoints ..................................................... B-57
B.19
EmbeddedICE-RT timing .......................................................................... B-59
B.20
Programming restriction ............................................................................ B-60
C.1
Summary of differences between Rev 3a and Rev 4 ................................. C-2
C.2
Copyright © 2001, 2004 ARM Limited. All rights reserved.
Contents
v

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents