Exceptions; Table 2-3 Exception Entry And Exit - ARM ARM7TDMI Technical Reference Manual

Programmer's Model
2.8

Exceptions

2.8.1 Exception entry and exit summary
Exception
Return instruction
or entry
MOV PC, R14
BL
MOVS PC, R14_svc
SWI
MOVS PC, R14_und
UDEF
SUBS PC, R14_abt, #4
PABT
2-16
Exceptions arise whenever the normal flow of a program has to be halted temporarily,
for example, to service an interrupt from a peripheral. Before attempting to handle an
exception, the ARM7TDMI processor preserves the current processor state so that the
original program can resume when the handler routine has finished.
If two or more exceptions arise simultaneously, the exceptions are dealt with in the fixed
order given in Table 2-3.
This section provides details of the ARM7TDMI processor exception handling:
• Exception entry and exit summary
• Entering an exception on page 2-17
• Leaving an exception on page 2-18
• Fast interrupt request on page 2-18
• Interrupt request on page 2-19
• Software interrupt instruction on page 2-21
• Undefined instruction on page 2-21
• Exception vectors on page 2-21
• Exception priorities on page 2-22.
Table 2-3 summarizes the pc value preserved in the relevant r14 on exception entry, and
the recommended instruction for exiting the exception handler.
Previous state ARM r14_x
Thumb r14_x
PC+4
PC+4
PC+4
PC+4
Copyright © 2001, 2004 ARM Limited. All rights reserved.

Table 2-3 Exception entry and exit

Remarks
PC+2 Where PC is the address of the BL, SWI, or
undefined instruction fetch that had the
PC+2
Prefetch Abort
PC+2
PC+4
ARM DDI 0210C