Test Data Registers; Figure B-3 Id Code Register Format - ARM ARM7TDMI Technical Reference Manual

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Debug in Depth
B.6

Test data registers

B.6.1
Bypass register
B.6.2
ARM7TDMI core device IDentification (ID) code register
31
0
Version
B-14
There are seven test data registers that can connect between TDI and TDO:
Bypass register
ARM7TDMI core device IDentification (ID) code register
Instruction register on page B-15
Scan path select register on page B-15
Scan chains 0, 1, 2, and 3 on page B-16.
In the following test data register descriptions, data is shifted during every TCK cycle.
Purpose
Bypasses the device during scan testing by providing a path
between TDI and TDO.
Length
1 bit.
Operating mode
When the BYPASS instruction is the current instruction in the
instruction register, serial data is transferred from TDI to TDO in
the SHIFT-DR state with a delay of one TCK cycle. There is no
parallel output from the bypass register.
A 0 is loaded from the parallel input of the bypass register in the
CAPTURE-DR state.
Purpose
Reads the 32-bit device identification code. No programmable
supplementary identification code is provided.
Length
32 bits. The format of the register is as shown in Figure B-3.
28 27
1 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1
Copyright © 2001, 2004 ARM Limited. All rights reserved.
Part number
12 11
Manufacturer identity

Figure B-3 ID code register format

ARM DDI 0210C
1 0
1

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