Intel SR9000MK4U - Server System - 0 MB RAM Product Manual page 200

Table 32. POST Codes Generated by SAL and Logged at the Seven
No
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
178
Code
1EA Console initialization
1F5 Chipset initialization
Memory initialization
1F4 Recovery SDA initialization
1EC SAL_A shadowing
Both BSP and AP jump to the shadowing code.
1E2 Decides whether recovery is necessary
1E4 Decides whether recovery is necessary
1E6 FIT checksums
1E7 Recovery POST termination
006 Finalize memory layout
Memory attribut register initialization
016 SAL data area initialization
014 SAL shadowing
0F2 FREQ_BASE acquisition
013 PAL shadowing
012 IA32BIOS shadowing
029 Wake up an AP
Execute and guard AP self-test
Code directly calls and initializes POST task for AP self-test
Reboot the memory or processor that has errored
0F1 Memory-based Mutex* service initialization
0F0 Runtime memory allocator initialization
oD1 Error record buffer initialization
0D2 MCA handler initialization
033 Initialize interrupt vector table (IVT)
oCB Multiple host bus bridge initialization
0D6 PCI initialization
001 Transfer to virtual mode
015 IA32BIOS execution
004 Transfer to physical mode
oF8 Initialize IDE controller
0F4 PCI initialization after returning from IA32 BIOS
oF3 RAS late initialization
Segment LED
Description
®
Intel Server System SR9000MK4U Product Guide
Operation to
Recover
Check previous SEL