Asynchronous Serial Interface N (Uartn); Features - NEC V850ES/SA2 UPD703201 Manual

32-bit single-chip microcontrollers
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12.2 Asynchronous Serial Interface n (UARTn)

12.2.1 Features

• Transfer rate: 300 bps to 312.5 kbps (using a dedicated baud rate generator and an internal system clock of 17
MHz)
• Full-duplex communications
On-chip receive buffer register n (RXBn)
On-chip transmit buffer register n (TXBn)
• Two-pin configuration
Note
TXDn: Transmit data output pin
RXDn: Receive data input pin
• Reception error detection functions
• Parity error
• Framing error
• Overrun error
• Interrupt sources: 3 types
• Reception error interrupt (INTSREn):
• Reception completion interrupt (INTSRn):
• Transmission completion interrupt (INTSTn): Interrupt is generated when the serial transmission of transmit
• The character length of transmit/receive data is specified by the ASIMn register
• Character length: 7 or 8 bits
• Parity functions: Odd, even, 0, or none
• Transmission stop bits: 1 or 2 bits
• On-chip dedicated baud rate generator
Remark
n = 0, 1
CHAPTER 12 SERIAL INTERFACE FUNCTION
Interrupt is generated according to the logical OR of the three
types of reception errors
Interrupt is generated when receive data is transferred from the
shift register to receive buffer register n after serial transfer is
completed during a reception enabled state
data (8 or 7 bits) from the shift register is completed
Preliminary User's Manual U15905EJ1V0UD
299

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