21.4 Mhz Anti-Alias Filter; Mixer; Fourth L.o; Post Down Conversion Filtering - Agilent Technologies PSA Series Service Manual

Troubleshooting the IF Section
A8 Analog IF Assembly Description

21.4 MHz Anti-Alias Filter

This filter serves two purposes. First, it rejects the image band at
31.4 MHz to 41.4 MHz. Second, it band limits the signal to a width of
10 MHz, and so provides much of the anti-alias filtering for the ADC.

Mixer

The third mixer converts the incoming 21.4 MHz third IF down to the
final IF at 7.5 MHz. This is accomplished by mixing the 21.4 MHz third
IF with a 28.9 MHz LO. The difference frequency is 7.5 MHz.

Fourth L.O.

The 28.9 MHz LO signal is phase locked to the 10 MHz frequency
reference from the A11 reference assembly.

Post Down Conversion Filtering

There are two post-mixing filters for the 7.5 MHz final IF. The
12.5 MHz low pass filter removes high order mixing products from the
third LO, as well as the 21.4 MHz feed-through. The 2 MHz wide,
7.5 MHz band pass filter provides additional filtering for narrow
resolution bandwidths, and is used to improve spurious free
dynamic-range. The 12.5 MHz LPF is switched in when the pre-filters
are bypassed (RBW > 1.2 MHz), or when in LC pre-filter BW 1.41 MHz
(RBW 620 kHz) and 2.83 MHz (RBW 1.1 MHz).

Calibration Generator

Creates a 21.4 MHz signal which is routed to the A10 3rd Converter.
The 3rd converter up converts to 321.4 MHz and this signal is used
during the auto align routine for the adjustment of the filter
bandwidths and amplitude settings of the AIF and DIF assembly.
Press: , , to execute the auto align
NOTE System Alignments Align All Now
routine.

Clock Generator

The clock is a 30MSa/s differential ECL clock that is distributed on the
motherboard to the digital IF as SR_L and SR_H (Sample Rate low and
high). The clock generator is locked to the 10 MHz reference signal.
134 Chapter 6