Holtek HT32F54231 User Manual page 77

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F54231/HT32F54241/HT32F54243/HT32F54253
Bits Field
[8] WUP0EN
[7] ULDOON
[3] LDOOFF
[2] LDOLCM
[0] PWCURST
Rev. 1.00
Descriptions
External WAKEUP0 Pin Enable
0: Disable WAKEUP0 pin function
1: Enable WAKEUP0 pin function
The software can set the WUP0EN bit as 1 to enable the WAKEUP0 pin function
before entering the power saving mode. When WUP0EN = 1, a change on the
WAKEUP0 pin wakes up the system from the power saving mode. If the WAKEUP0
pin is active high, this bit will set an input pull down mode.
Ultra-low power regulator Control
0: ULDO is OFF
1: ULDO is ON
An ultra-low power regulator ULDO is implemented to provide an alternative voltage
source for the V power domain when the MCU enters the Deep-Sleep mode
CORE
(SLEEPDEEP = 1). The control bit ULDOON is set by software and cleared by
software or V power domain reset. If the ULDOON bit is set to 1, the main LDO
DD
will automatically be turned off when the MCU enters the Deep-Sleep mode.
Main regulator Operating Mode Control
0: The LDO operates in a low current mode when MCU enters the Deep-Sleep
mode (SLEEPDEEP = 1). That means MCU V
supplied by ultra-low power regulator ULDO.
1: The LDO is turned off when the MCU enters the Deep-Sleep mode
(SLEEPDEEP = 1). That means MCU V
power down mode.
Note: This bit is only available when the ULDOON bit is cleared to 0.
LDO Low Current Mode
0: The V power domain is supplied by main regulator LDO in normal current
CORE
mode.
1: The V power domain is supplied by ultra-low power regulator ULDO in low
CORE
current mode.
Note: This bit is only available when MCU is operated in the run mode. The ULDO
output current capability is limited at 5 mA below and lower static current. It
is suitable for MCU is operated at lower speed system clock to get a lower
current consumption. This bit will be clear to 0 when the MCU is into V
power domain reset or the nRST pin is occurred reset signal.
Power Control Unit Software Reset
0: No action
1: Power Control Unit Software Reset is activated.
When this bit is set, it will reset all the related RTC and PWRCU registers.
77 of 576
power is available and
CORE
power is not available and enters
CORE
January 28, 2022
DD